參數(shù)資料
型號: EPF10K200EBC600-1
廠商: Altera
文件頁數(shù): 14/100頁
文件大?。?/td> 0K
描述: IC FLEX 10KE FPGA 200K 600-BGA
產(chǎn)品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
標準包裝: 12
系列: FLEX-10KE®
LAB/CLB數(shù): 1248
邏輯元件/單元數(shù): 9984
RAM 位總計: 98304
輸入/輸出數(shù): 470
門數(shù): 513000
電源電壓: 2.3 V ~ 2.7 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 600-BGA
供應商設備封裝: 600-BGA(45x45)
20
Altera Corporation
FLEX 10KE Embedded Programmable Logic Devices Data Sheet
Cascade Chain
With the cascade chain, the FLEX 10KE architecture can implement
functions that have a very wide fan-in. Adjacent LUTs can be used to
compute portions of the function in parallel; the cascade chain serially
connects the intermediate values. The cascade chain can use a logical AND
or logical OR (via De Morgan’s inversion) to connect the outputs of
adjacent LEs. An a delay as low as 0.6 ns per LE, each additional LE
provides four more inputs to the effective width of a function. Cascade
chain logic can be created automatically by the Altera Compiler during
design processing, or manually by the designer during design entry.
Cascade chains longer than eight bits are implemented automatically by
linking several LABs together. For easier routing, a long cascade chain
skips every other LAB in a row. A cascade chain longer than one LAB
skips either from even-numbered LAB to even-numbered LAB, or from
odd-numbered LAB to odd-numbered LAB (e.g., the last LE of the first
LAB in a row cascades to the first LE of the third LAB). The cascade chain
does not cross the center of the row (e.g., in the EPF10K50E device, the
cascade chain stops at the eighteenth LAB and a new one begins at the
nineteenth LAB). This break is due to the EAB’s placement in the middle
of the row.
Figure 10 shows how the cascade function can connect adjacent LEs to
form functions with a wide fan-in. These examples show functions of
4n variables implemented with n LEs. The LE delay is 0.9 ns; the cascade
chain delay is 0.6 ns. With the cascade chain, 2.7 ns are needed to decode
a 16-bit address.
Figure 10. FLEX 10KE Cascade Chain Operation
LE1
LUT
LE2
LUT
d[3..0]
d[7..4]
d[(4n – 1)..(4n – 4)]
d[3..0]
d[7..4]
LEn
LE1
LE2
LEn
LUT
AND Cascade Chain
OR Cascade Chain
d[(4n – 1)..(4n – 4)]
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EPF10K200EBC600-3 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 1248 LABs 470 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K200EBI600-2 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 1248 LABs 470 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EPF10K200EFC672-1 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Flex 10K 1248 LABs 470 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
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