參數(shù)資料
型號: EPF10K130V
廠商: Altera Corporation
英文描述: EMBEDDED PROGRAMMABLE LOGIC FAMILY
中文描述: 嵌入式可編程邏輯系列
文件頁數(shù): 26/120頁
文件大小: 1901K
代理商: EPF10K130V
Altera Corporation
13
FLEX 10KE Embedded Programmable Logic Family Data Sheet
Figure 4. FLEX 10KE Device in Single-Port RAM Mode
Note:
(1)
EPF10K30E, EPF10K50E, and EPF10K50S devices have 88 EAB local interconnect channels; EPF10K100E,
EPF10K100B, EPF10K130E, EPF10K200E, and EPF10K200S devices have 104 EAB local interconnect channels.
EABs can be used to implement synchronous RAM, which is easier to use
than asynchronous RAM. A circuit using asynchronous RAM must
generate the RAM write enable signal, while ensuring that its data and
address signals meet setup and hold time specifications relative to the
write enable signal. In contrast, the EAB’s synchronous RAM generates its
own write enable signal and is self-timed with respect to the input or write
clock. A circuit using the EAB’s self-timed RAM must only meet the setup
and hold time specifications of the global clock.
Column Interconnect
EAB Local
Interconnect (1)
Dedicated Inputs
& Global Signals
DQ
RAM/ROM
256
× 16
512
× 8
1,024
× 4
2,048
× 2
Data In
Address
Write Enable
Data Out
4, 8, 16, 32
DQ
4
8, 4, 2, 1
8, 9, 10, 11
Row Interconnect
Dedicated
Clocks
2
4, 8
Chip-Wide
Reset
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相關(guān)代理商/技術(shù)參數(shù)
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