參數(shù)資料
型號： EPF10K10ATI144-3N
廠商： Altera
文件頁數(shù)： 64/128頁
文件大小： 0K
描述： IC FLEX 10KA FPGA 10K 144-TQFP
產(chǎn)品培訓(xùn)模塊： Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝： 180
系列： FLEX-10K®
LAB/CLB數(shù)： 72
邏輯元件/單元數(shù)： 576
RAM 位總計(jì)： 6144
輸入/輸出數(shù)： 102
門數(shù)： 31000
電源電壓： 3 V ~ 3.6 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 144-LQFP
供應(yīng)商設(shè)備封裝： 144-TQFP（20x20）
40
Altera Corporation
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
Table 12 describes the FLEX 10K device supply voltages and MultiVolt
I/O support levels.
Note
(1)
240-pin QFP packages do not support the MultiVolt I/O features, so they do not have separate VCCIO pins.
Power Sequencing & Hot-Socketing
Because FLEX 10K devices can be used in a multi-voltage environment,
they have been designed specifically to tolerate any possible power-up
sequence. The VCCIO and VCCINT power supplies can be powered in any
order.
Signals can be driven into FLEX 10KA devices before and during power
up without damaging the device. Additionally, FLEX 10KA devices do
not drive out during power up. Once operating conditions are reached,
FLEX 10KA devices operate as specified by the user.
IEEE Std.
1149.1 (JTAG)
Boundary-Scan
Support
All FLEX 10K devices provide JTAG BST circuitry that complies with the
IEEE Std. 1149.1-1990 specification. All FLEX 10K devices can also be
configured using the JTAG pins through the BitBlaster serial download
cable, or ByteBlasterMV parallel port download cable, or via hardware
that uses the JamTM programming and test language. JTAG BST can be
performed before or after configuration, but not during configuration.
FLEX 10K devices support the JTAG instructions shown in Table 13.
Table 12. Supply Voltages & MultiVolt I/O Support Levels
Devices
Supply Voltage (V)
MultiVolt I/O Support Levels (V)
VCCINT
VCCIO
Input
Output
FLEX 10K (1)
5.0
3.3 or 5.0
5.0
3.3
3.3 or 5.0
EPF10K50V (1)
3.3
3.3 or 5.0
EPF10K130V
3.3
3.3 or 5.0
FLEX 10KA (1)
3.3
2.5, 3.3, or 5.0
3.3 or 5.0
3.3
2.5
2.5, 3.3, or 5.0
2.5
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