參數(shù)資料
型號: EPC1213
廠商: Electronic Theatre Controls, Inc.
英文描述: Configuration Devices for SRAM-Based LUT Devices
中文描述: 配置SRAM器件基于LUT的器件
文件頁數(shù): 18/28頁
文件大小: 380K
代理商: EPC1213
18
Altera Corporation
Configuration Devices for ACEX, APEX, FLEX & Mercury Devices Data Sheet
3.3-V or 5.0-V Operation
EPC2, EPC1, and EPC1441 devices can configure 5.0-V, 3.3-V, or 2.5-V
devices. For each configuration device, an option must be set for 5.0-V or
3.3-V operation. For EPC1 and EPC1441 configuration devices, the
Use
Low-Voltage Configuration EPROM
option in the
Global Project Device
Options
dialog box (Assign menu) in the MAX+PLUS II software sets this
parameter. (For APEX 20K and Mercury devices, the Quartus software
provides a similar option.) For EPC2 devices, this option is set externally
by the
VCCSEL
pin. In addition, the EPC2 device has an externally
controlled option, set by the
VPPSEL
pin, to adjust the programming
voltage to 5.0V or 3.3 V.
The functions of the
VCCSEL
and
VPPSEL
pins are described below.
I
VCCSEL
pin
For EPC2 configuration devices, 5.0-V or 3.3-V
operation is controlled by the
VCCSEL
option pin. The device
functions in 5.0-V mode when
VCCSEL
is connected to
GND
; the
device functions in 3.3-V mode when
VCCSEL
is connected to V
CC
.
I
VPPSEL
pin
The EPC2
VPP
programming power pin is normally
tied to V
CC
. For EPC2 devices operating with a 3.3-V supply, it is
possible to improve EPC2 in-system programming times by
providing
VPP
with a 5.0-V supply. For all other devices,
VPP
must be
tied to V
CC
. The EPC2 device
s
VPPSEL
pin must be set in accordance
with the EPC2
VPP
pin. If the
VPP
pin is supplied by a 5.0-V supply,
VPPSEL
must be connected to
GND
; if the
VPP
pin is supplied by a
3.3-V power supply,
VPPSEL
must be connected to V
CC
.
Table6
describes the relationship between the V
CC
and V
PP
voltage levels
and the required logic level for
VCCSEL
and
VPPSEL
(i.e., high or low
logic level).
Table 6. VCCSEL & VPPSEL Pin Functions on the EPC2
V
CC
Voltage Level
(V)
V
PP
Voltage Level
(V)
VCCSEL Pin Logic
Level
VPPSEL Pin Logic
Level
3.3
3.3
5.0
3.3
5.0
5.0
High
High
Low
High
Low
Low
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