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參數資料
| 型號： | EP9312-IBZ |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Universal Platform System-on-chip Processor |
| 中文描述： | 32-BIT, 184 MHz, RISC PROCESSOR, PBGA352 |
| 封裝： | 27 X 27 MM, LEAD FREE, PLASTIC, BGA-352 |
| 文件頁數： | 13/62頁 |
| 文件大?。?/td> | 884K |
| 代理商： | EP9312-IBZ |
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DS515PP7
Copyright 2005 Cirrus Logic (All Rights Reserved)
13
EP9312
Universal Platform SOC Processor
DC Characteristics
Note:
4. For open drain pins, high level output voltage is dependent on the external load.
5. All inputs that do not include internal pull-ups or pull-downs, must be externally driven for proper operation (See
Table S on
page 59
). If an input is not driven, it should be tied to power or ground, depending on the particular function. If an I/O pin is not
driven and programmed as an input, it should be tied to power or ground through its own resistor.
(T
A
= 0 to 70° C; CVDD = VDD_PLL = 1.8; RVDD = 3.3 V;
All grounds = 0 V; all voltages with respect to 0 V unless otherwise noted)
Parameter
Symbol
Min
Max
Unit
High level output voltage
Iout = -4 mA
(Note 4)
V
oh
0.85
×
RVDD
-
V
Low level output voltage
Iout = 4 mA
V
ol
-
0.15
×
RVDD
V
High level input voltage
(Note 5)
V
ih
0.65
×
RVDD
VDD + 0.3
V
Low level input voltage
(Note 5)
V
il
-0.3
0.35
×
RVDD
V
High level leakage current
Vin = 3.3 V
(Note 5)
I
ih
-
10
μA
Low level leakage current
Vin = 0
(Note 5)
I
il
-
-10
μA
Parameter
Min
Typ
Max
Unit
Power Supply Pins (Outputs Unloaded)
Power Supply Current:
CVDD / VDD_PLL Total
RVDD
-
-
190
45
240
80
mA
mA
Low-Power Mode Supply Current
CVDD / VDD_PLL Total
RVDD
-
-
2
1.0
3.5
2
mA
mA
相關PDF資料 |
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