參數(shù)資料
型號(hào): EP9312-EB
廠商: Cirrus Logic, Inc.
英文描述: Universal Platform System-on-chip Processor
中文描述: 通用平臺(tái)系統(tǒng)芯片處理器
文件頁數(shù): 43/62頁
文件大?。?/td> 884K
代理商: EP9312-EB
DS515PP7
Copyright 2005 Cirrus Logic (All Rights Reserved)
43
EP9312
Universal Platform SOC Processor
Ethernet MAC Interface
STA - Station - Any device that contains an IEEE 802.11 conforming Medium Access Control (MAC) and physical layer
(PHY) interface to the wireless medium.
PHY - Ethernet physical layer interface.
Parameter
Symbol
Min
Typ
Max
Unit
10 Mbit
mode
100 Mbit
mode
10 Mbit
mode
100 Mbit
mode
10 Mbit
mode
100 Mbit
mode
TXCLK cycle time
t
TX_per
-
-
400
40
-
-
ns
TXCLK high time
t
TX_high
140
14
200
20
260
26
ns
TXCLK low time
t
TX_low
140
14
200
20
260
26
ns
TXCLK to signal transition delay time
t
TXd
0
0
10
10
25
25
ns
TXCLK rise/fall time
t
TXrf
-
-
-
-
5
5
ns
RXCLK cycle time
t
RX_per
-
-
400
40
-
-
ns
RXCLK high time
t
RX_high
140
14
200
20
260
26
ns
RXCLK low time
t
RX_low
140
14
200
20
260
26
ns
RXDVAL / RXERR setup time
t
RXs
10
10
-
-
-
-
ns
RXDVAL / RXERR hold time
t
RXh
10
10
-
-
-
-
ns
RXCLK rise/fall time
t
RXrf
-
-
-
-
5
5
ns
MDC cycle time
t
MDC_per
-
-
400
400
-
-
ns
MDC high time
t
MDC_high
160
160
-
-
-
-
ns
MDC low time
t
MDC_low
160
160
-
-
-
-
ns
MDC rise/fall time
t
MDCrf
-
-
-
-
5
5
ns
MDIO setup time (STA sourced)
t
MDIOs
10
10
-
-
-
-
ns
MDIO hold time (STA sourced)
t
MDIOh
10
10
-
-
-
-
ns
MDC to MDIO signal transition delay time
(PHY sourced)
t
MDIOd
-
-
-
-
300
300
ns
相關(guān)PDF資料
PDF描述
EP9312-EBZ Universal Platform System-on-chip Processor
EP9312-IB Universal Platform System-on-chip Processor
EP9312-IBZ Universal Platform System-on-chip Processor
EP9315-EB Enhanced Universal Platform System-on-Chip Processor
EP9315-EBZ Enhanced Universal Platform System-on-Chip Processor
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參數(shù)描述
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