參數(shù)資料
型號： EP7312-IR-C
廠商： Cirrus Logic, Inc.
英文描述： GT 3C 3#16S PIN PLUG
中文描述： 高性能，低功率系統(tǒng)，片上內(nèi)存和增強的數(shù)字音頻接口
文件頁數(shù)： 8/64頁
文件大?。?/td> 1710K
代理商： EP7312-IR-C
8
Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
DS508PP5
EP7312
High-Performance, Low-Power System on Chip
CODEC Interface
The EP7312 includes an interface to telephony-type
CODECs for easy integration into voice-over-IP and
other voice communications systems. The CODEC
interface is multiplexed to the same pins as the DAI and
SSI2.
Table
6
shows
the
Assignments.
CODEC
Interface
Pin
Note:
See
Table 18 on page 11
for information on pin
multiplexes.
SSI2 Interface
An additional SPI/ Microwire1-compatible interface is
available
for
both
master
communications. The SSI2 unit shares the same pins as
the DAI and CODEC interfaces through a multiplexer.
TheSSI2 Interface has these features:
and
slave
mode
Synchronous clock speeds of up to 512 kHz
Separate 16 entry TX and RX half-word wide FIFOs
Half empty/ full interrupts for FIFOs
Separate RX and TX frame sync signals for
asymmetric traffic
Table 7
shows the SSI2 Interfacepin assignments.
Note:
See
Table 18 on page 11
for information on pin
multiplexes.
Synchronous Serial Interface
The EP7312 Synchronous Serial Interface has these
features:
ADC (SSI) Interface: Master modeonly; SPI and
Microwire1-compatible(128 kbps operation)
Selectableserial clock polarity
Table 8
shows the Synchronous Serial Interface pin
assignments.
LCD Controller
A DMA address generator is provided that fetches video
display data for the LCD controller from memory. The
display frame buffer start address is programmable,
allowing the LCD frame buffer to be in SDRAM, internal
SRAM or external SRAM. The LCD controller has these
features:
Interfaces directly toa single-scan panel monochrome
STN LCD
Interfaces to a single-scan panel color STN LCD with
minimal external gluelogic
Panel width sizeis programmablefrom 32 to 1024
pixels in 16-pixel increments
Video frame buffer sizeprogrammableup to
128 KB
Bits per pixel of 1, 2, or 4 bits
Table 9
shows the LCD Interfacepin assignments.
Table 6. CODEC Interface Pin Assignments
Pin Mnemonic
I/O
Pin Description
PCMCLK
O
Serial bit clock
PCMOUT
O
Serial data out
PCMIN
I
Serial data in
PCMSYNC
O
Frame sync
Table 7. SSI2 Interface Pin Assignments
Pin Mnemonic
I/O
Pin Description
SSICLK
I/O
Serial bit clock
SSITXDA
O
Serial data out
SSIRXDA
I
Serial data in
SSITXFR
I/O
Transmit frame sync
SSIRXFR
I/O
Receive frame sync
Table 8. Serial Interface Pin Assignments
Pin Mnemonic
I/O
Pin Description
ADCLK
O
SSI1 ADC serial clock
ADCIN
I
SSI1 ADC serial input
ADCOUT
O
SSI1 ADC serial output
nADCCS
O
SSI1 ADC chip select
SMPCLK
O
SSI1 ADC sample clock
Table 9. LCD Interface Pin Assignments
Pin Mnemonic
I/O
Pin Description
CL1
O
LCD line clock
CL2
O
LCD pixel clock out
DD[3:0]
O
LCD serial display data bus
FRM
O
LCD frame synchronization pulse
M
O
LCD AC bias drive
相關(guān)PDF資料
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EP7312-IV-C 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
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