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參數(shù)資料
| 型號： | EP7312-EV-90 |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| 中文描述： | 高性能，低功耗的片上系統(tǒng)的SDRAM和增強(qiáng)數(shù)字音頻接口 |
| 文件頁數(shù)： | 6/64頁 |
| 文件大?。?/td> | 1710K |
| 代理商： | EP7312-EV-90 |
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6
Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
DS508PP5
EP7312
High-Performance, Low-Power System on Chip
Description of the EP7312’s Components, Functionality, and Interfaces
The following sections describe the EP7312 in more
detail.
Processor Core - ARM720T
The EP7312 incorporates an ARM 32-bit RISC micro
controller
that
controls a wide range of
peripherals. The processor utilizes a three-stage pipeline
consisting of fetch, decode and execute stages. Key
features include:
on-chip
ARM (32-bit) and Thumb (16-bit compressed)
instruction sets
Enhanced MMU for MicrosoftWindowsCE and other
operating systems
8 KB of 4-way set-associative cache.
Translation Look AsideBuffers with 64 Translated
Entries
Power Management
The EP7312 is designed for ultra-low-power operation.
Its core operates at only 2.5 V, while its I/ O has an
operation range of 2.5 V–3.3 V. Thedevicehas three basic
power states:
Operating — This stateis thefull performance
state. All theclocks and peripheral logic are
enabled.
Idle — This state is thesame as the Operating
State, except theCPU clock is halted while
waiting for an event such as a key press.
Standby — This stateis equivalent to the
computer being switched off (no display), and
themain oscillator shut down.An event such as
a key press can wake-up theprocessor.
Table 1
shows the power management pin assignments.
MaverickKey
Unique ID
MaverickKey unique hardware programmed IDs are a
solution to the growing concern over secure web content
and
commerce. With Internet security
important role in the delivery of digital media such as
books or music, traditional softwaremethods arequickly
playing
an
becoming unreliable. The MaverickKey unique IDs
provide OEMs with a method of utilizing specific
hardware IDs such as those assigned for SDMI (Secure
Digital Music Initiative) or any other authentication
mechanism.
Both a specific 32-bit ID as well as a 128-bit random ID is
programmed into the EP7312 through the use of laser
probing technology. TheseIDs can then beused to match
secure copyrighted content with the ID of the target
device the EP7312 is powering, and then deliver the
copyrighted information over a secure connection. In
addition,
secure
transactions
matching device IDs to server IDs. MaverickKey IDs
provide a level of hardware security required for today’s
Internet appliances.
can
benefit
by
also
Memory Interfaces
There are two main external memory interfaces. The first
one is the ROM/ SRAM/ FLASH-style interface that has
programmable wait-state timings and includes burst-
mode capability, with six chip selects decoding six
256 MB sections of addressable space. For maximum
flexibility, each bank can be specified to be 8-, 16-, or 32-
bits wide. This allows the use of 8-bit-wide boot ROM
options to minimize overall system cost. The on-chip
boot ROM can be used in product manufacturing to
serially download system code into system FLASH
memory.
To
further
minimize
requirements and cost, theARM Thumb instruction set is
supported, providing for the use of high-speed 32-bit
operations in 16-bit op-codes and yielding industry-
leading code density. shows the Static Memory Interface
pin assignments.
system
memory
Note:
Pins are multiplexed. See
Table 19 on page 11
for
more information.
Table 1. Power Management Pin Assignments
Pin Mnemonic
I/O
Pin Description
BATOK
I
Battery ok input
nEXTPWR
I
External power supply sense
input
nPWRFL
I
Power fail sense input
nBATCHG
I
Battery changed sense input
Table 2. Static Memory Interface Pin Assignments
Pin Mnemonic
I/O
Pin Description
nCS[5:0]
O
Chip select out
A[27:0]
O
Address output
D[31:0]
I/O
Data I/O
nMOE/nSDCAS
(Note)
O
ROM expansion OP enable
nMWE/nSDWE
(Note)
O
ROM expansion write enable
HALFWORD
O
Halfword access select
output
WORD
O
Word access select output
WRITE/nSDRAS
(Note)
O
Transfer direction
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EP7312-EV-C | HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| EP7312-IV-90 | HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| EP7312-IV-C | HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| EP7312-IB-90 | HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| EP7312 | HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EP7312-EV-C | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| EP7312-IB | 功能描述:IC ARM720T MCU 74MHZ 256-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:EP7 標(biāo)準(zhǔn)包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，LIN，SPI，UART/USART，USI 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):16 程序存儲(chǔ)器容量:8KB（4K x 16） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:帶卷 (TR) |
| EP7312-IB-90 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:High-performance, Low-power, System-on-chip with SDRAM & Enhanced with SDRAM & Enhanced |
| EP7312-IB-C | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| EP7312-IBZ | 功能描述:音頻片上系統(tǒng) - SoC IC Hgh-Prfrmnc Low- Power SOC w/SDRAM RoHS:否 制造商:Cirrus Logic |
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