參數(shù)資料
型號(hào)： EP7312-ER-C
廠商： Cirrus Logic, Inc.
英文描述： HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
中文描述： 高性能，低功率系統(tǒng)，片上內(nèi)存和增強(qiáng)的數(shù)字音頻接口
文件頁(yè)數(shù)： 54/64頁(yè)
文件大?。?/td> 1710K
代理商： EP7312-ER-C
54
Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
DS508PP5
EP7312
High-Performance, Low-Power System on Chip
*
“
With p/u
”
means with internal pull-up of 100 KOhms on the pin.
Strength 1 = 4 ma
Strength 2 = 12 ma
Input. Port A,B,D,E GPIOs default to input at nPOR and URESET conditions.
JTAG Boundary Scan Signal Ordering
R5
SSITXDA
1
Low
O
DAI/CODEC/SSI2 serial data output
R6
nADCCS
1
High
O
SSI1 ADC chip select
R7
VDDIO
Pad power
Digital I/O power, 3.3V
R8
ADCOUT
1
Low
O
SSI1 ADC serial data output
R9
COL[7]
1
High
O
Keyboard scanner column drive
R10
COL[3]
1
High
O
Keyboard scanner column drive
R11
COL[1]
1
High
O
Keyboard scanner column drive
R12
D[30]
1
Low
I/O
Data I/O
R13
A[27]/DRA[0]
2
Low
O
System byte address / SDRAM address
R14
A[25]/DRA[2]
2
Low
O
System byte address / SDRAM address
R15
VDDIO
Pad power
Digital I/O power, 3.3V
R16
A[24]/DRA[3]
1
Low
O
System byte address / SDRAM address
T1
VDDRTC
RTC power
Real time clock power, 2.5V
T2
PD[7]/SDQM[1]
1
Low
I/O
GPIO port D / SDRAM byte lane mask
T3
PD[6]/SDQM[0]
1
Low
I/O
GPIO port D / SDRAM byte lane mask
T4
PD[3]
1
Low
I/O
GPIO port D
T5
SSICLK
1
Input
I/O
DAI/CODEC/SSI2 serial clock
T6
SSIRXFR
1
Input
I/O
DAI/CODEC/SSI2 frame sync
T7
VDDCORE
Core power
Core power, 2.5V
T8
DRIVE[0]
2
High /
Low
I/O
PWM drive output
T9
FB[1]
I
PWM feedback input
T10
COL[5]
1
High
O
Keyboard scanner column drive
T11
VDDIO
Pad power
Digital I/O power, 3.3V
T12
BUZ
1
Low
O
Buzzer drive output
T13
D[28]
1
Low
I/O
Data I/O
T14
A[26]/DRA[1]
2
Low
O
System byte address / SDRAM address
T15
D[25]
1
Low
I/O
Data I/O
T16
VSSIO
Pad ground
I/O ground
Table 23. JTAG Boundary Scan Signal Ordering
LQFP
Pin No.
TFBGA
Ball
PBGA
Ball
Signal
Type
Position
1
B3
B1
nCS[5]
O
1
4
A2
C2
EXPCLK
I/O
3
5
B1
E4
WORD
O
6
6
E3
D1
WRITE/nSDRAS
O
8
7
C1
F5
RUN/CLKEN
O
10
Table 22. 256-Ball PBGA Ball Listing (Continued)
Ball Location
Name
Strength
Reset
State
Type
Description
相關(guān)PDF資料
PDF描述
EP7312-IR-C GT 3C 3#16S PIN PLUG
EP7312-CR-90 HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP7312-ER-90 HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP7312-IR-90 HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP9301 Entry-level ARM9 System-on-chip Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP7312-EV-90 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM ON CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP7312-EV-C 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
EP7312-IB 功能描述:IC ARM720T MCU 74MHZ 256-PBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:EP7 標(biāo)準(zhǔn)包裝:1,500 系列:AVR® ATtiny 核心處理器:AVR 芯體尺寸:8-位 速度:16MHz 連通性:I²C，LIN，SPI，UART/USART，USI 外圍設(shè)備:欠壓檢測(cè)/復(fù)位，POR，PWM，溫度傳感器，WDT 輸入/輸出數(shù):16 程序存儲(chǔ)器容量:8KB（4K x 16） 程序存儲(chǔ)器類型:閃存 EEPROM 大小:512 x 8 RAM 容量:512 x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 11x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:帶卷 (TR)
EP7312-IB-90 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:High-performance, Low-power, System-on-chip with SDRAM & Enhanced with SDRAM & Enhanced
EP7312-IB-C 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*