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參數(shù)資料
| 型號： | EP7311-CR-C |
| 廠商： | CIRRUS LOGIC INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | HIGH-PERFORMANCE, LOW-POWER SYSTEM-ON-CHIP WITH SDRAM AND ENHANCED DIGITAL AUDIO INTERFACE |
| 中文描述： | 32-BIT, 74 MHz, RISC MICROCONTROLLER, PBGA204 |
| 封裝： | 13 X 13 MM, 0.65 MM PITCH, TFBGA-204 |
| 文件頁數(shù)： | 34/54頁 |
| 文件大?。?/td> | 1533K |
| 代理商： | EP7311-CR-C |
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34
Copyright Cirrus Logic, Inc. 2003
(All Rights Reserved)
DS506PP1
EP7311
High-Performance, Low-Power System on Chip
204-Ball TFBGA Ball Listing
Thelist is ordered by ball location.
Table 21. 204-Ball TFBGA Ball Listing
Ball Location
Name
Strength
Reset
State
Type
Description
A1
VDDIO
Pad power
Digital I/O power,
3.3 V
A2
EXPCLK
1
I
Expansion clock
input
A3
nCS[3]
1
High
O
Chip select 3
A4
nCS[1]
1
High
O
Chip select 1
A5
nMWE/nSDWE
1
High
O
ROM, expansion
write enable/
SDRAM write enable
control signal
A6
SDQM[2]
2
Low
O
SDRAM byte lane
mask
A7
nSDCS[1]
1
High
O
SDRAM chip select
2
A8
DD[2]
1
Low
O
LCD serial display
data
A9
FRM
1
Low
O
LCD frame
synchronization
pulse
A10
CL[1]
1
Low
O
LCD line clock
A11
VSSCORE
Core ground
Core ground
A12
D[1]
1
Low
I/O
Data I/O
A13
A[2]
2
Low
O
System byte address
A14
D[4]
1
Low
I/O
Data I/O
A15
A[5]
1
Low
O
System byte address
A16
nPWRFL
I
Power fail sense
input
A17
MOSCOUT
O
Main oscillator out
A18
VSSIO
Pad ground
I/O ground
A19
VSSIO
Pad ground
I/O ground
A20
VSSIO
Pad ground
I/O ground
B1
WORD
1
Low
O
Word access select
output
B2
VDDIO
Pad power
Digital I/O power, 3.3
V
B3
nCS[5]
1
Low
O
Chip select 5
B4
nCS[2]
1
High
O
Chip select 2
B5
nMOE/nSDCAS
1
High
O
ROM, expansion OP
enable/SDRAM CAS
control signal
B6
SDCKE
2
Low
O
SDRAM clock
enable output
B7
nSDCS[0]
1
High
O
SDRAM chip select
0
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