參數(shù)資料
型號(hào): EP4SGX230DF29C3ES
廠商: Altera
文件頁數(shù): 7/82頁
文件大?。?/td> 0K
描述: IC STRATIX IV GX 230K 780-FBGA
標(biāo)準(zhǔn)包裝: 1
系列: Stratix® IV GX
LAB/CLB數(shù): 9120
邏輯元件/單元數(shù): 228000
RAM 位總計(jì): 17544192
輸入/輸出數(shù): 372
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 780-BBGA
供應(yīng)商設(shè)備封裝: 780-FBGA(29x29)
配用: 544-2594-ND - KIT DEVELOPMENT STRATIX IV
544-2592-ND - KIT DEV STRATIX IV 4SGX230N/C2
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–7
Electrical Characteristics
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
DC Characteristics
This section lists the supply current, I/O pin leakage current, bus hold, on-chip
termination (OCT) tolerance, input pin capacitance, and hot socketing specifications.
Supply Current
Standby current is the current drawn from the respective power rails used for power
budgeting. Use the Excel-based Early Power Estimator (EPE) to get supply current
estimates for your design because these currents vary greatly with the resources you
use.
f For more information about power estimation tools, refer to the PowerPlay Early Power
Handbook.
I/O Pin Leakage Current
Table 1–9 lists the Stratix IV I/O pin leakage current specifications.
VCCR_R
Receiver power (right side)
1.15
1.2
1.25
V
VCCT_L
Transmitter power (left side)
1.15
1.2
1.25
V
VCCT_R
Transmitter power (right side)
1.15
1.2
1.25
V
VCCL_GXBLn (3)
Transceiver clock power (left side)
1.15
1.2
1.25
V
VCCL_GXBRn (3)
Transceiver clock power (right side)
1.15
1.2
1.25
V
VCCH_GXBLn (3)
Transmitter output buffer power (left side)
1.33
1.4
1.47
V
VCCH_GXBRn (3)
Transmitter output buffer power (right side)
1.33
1.4
1.47
V
Notes to Table 1–8:
(1) For the recommended operating conditions for Stratix IV GT engineering sample (ES1) devices, contact your local Altera sales representative.
(2) Transceiver power supplies do not have power-on-reset circuitry. After initial power-up, violating the transceiver power supply operating
conditions could lead to unpredictable link behavior.
(3) n = 0, 1, 2, or 3.
Table 1–8. Transceiver Power Supply Operating Conditions for Stratix IV GT Devices (Part 2 of 2) (1), (2)
Symbol
Description
Minimum
Typical
Maximum
Unit
Table 1–9. I/O Pin Leakage Current for Stratix IV Devices (1)
Symbol
Description
Conditions
Min
Typ
Max
Unit
II
Input pin
VI = 0V to VCCIOMAX
-20
20
A
IOZ
Tri-stated I/O pin
VO = 0V to VCCIOMAX
-20
20
A
Note to Table 1–9:
(1) VREF current refers to the input pin leakage current.
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EP4SGX230DF29C3NES 功能描述:IC STRATIX IV GX 230K 780-FBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Stratix® IV GX 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)
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EP4SGX230DF29C4ES 制造商:Altera Corporation 功能描述:IC FPGA 372 I/O 780FBGA 制造商:Altera Corporation 功能描述:IC STRATIX IV GX FPGA 780FBGA
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