參數(shù)資料
型號： EP4SGX180KF40I3
廠商： Altera
文件頁數(shù)： 58/82頁
文件大?。?/td> 0K
描述： IC STRATIX IV FPGA 180K 1517FBGA
產品培訓模塊： Three Reasons to Use FPGA's in Industrial Designs
標準包裝： 3
系列： Stratix® IV GX
LAB/CLB數(shù)： 7030
邏輯元件/單元數(shù)： 175750
RAM 位總計： 13954048
輸入/輸出數(shù)： 744
電源電壓： 0.87 V ~ 0.93 V
安裝類型： 表面貼裝
工作溫度： -40°C ~ 100°C
封裝/外殼： 1517-BBGA
供應商設備封裝： 1517-FBGA（40x40）
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–53
Switching Characteristics
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
Table 1–38 lists the JTAG timing parameters and values for Stratix IV devices.
Temperature Sensing Diode Specifications
Table 1–39 lists the specifications for the Stratix IV temperature sensing diode.
Table 1–40 lists the specifications for the Stratix IV internal temperature sensing diode.
Remote update only in fast AS mode
4.3
5.3
10
MHz
Note to Table 1–37:
(1) This denotes the maximum frequency supported in the FPP configuration scheme. The frequency supported for
each device may vary depending on device density. For more information, refer to the Configuration, Design
Table 1–38. JTAG Timing Parameters and Values for Stratix IV Devices
Symbol
Description
Min
Max
Unit
tJCP
TCK clock period
30
—
ns
tJCH
TCK clock high time
14
—
ns
tJCL
TCK clock low time
14
—
ns
tJPSU (TDI)
TDI JTAG port setup time
1
—
ns
tJPSU (TMS)
TMS JTAG port setup time
3
—
ns
tJPH
JTAG port hold time
5
—
ns
tJPCO
JTAG port clock to output
—
11 (1)
ns
tJPZX
JTAG port high impedance to valid output
—
14 (1)
ns
tJPXZ
JTAG port valid output to high impedance
—
14 (1)
ns
Note to Table 1–38:
(1) A 1 ns adder is required for each VCCIO voltage step down from 3.0 V. For example, tJPCO = 12 ns if VCCIO of the TDO
I/O bank = 2.5 V, or 13 ns if it equals 1.8 V.
Table 1–39. External Temperature Sensing Diode Specifications for Stratix IV Devices
Description
Min
Typ
Max
Unit
Ibias, diode source current
8
—
500
A
Vbias, voltage across diode
0.3
—
0.9
V
Series resistance
—
< 5
Diode ideality factor
1.026
1.028
1.030
—
Table 1–37. Configuration Mode Specifications for Stratix IV Devices
Programming Mode
DCLK FMAX
Unit
Min
Typ
Max
Table 1–40. Internal Temperature Sensing Diode Specifications for Stratix IV Devices
Temperature
Range
Accuracy
Offset Calibrated
Option
Sampling Rate
Conversion
Time
Resolution
Minimum Resolution
with No Missing Codes
–40 to 100 °C
±8 °C
No
Frequency:
500 kHz, 1 MHz
< 100 ms
8 bits
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EP4SGX180KF40I3N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 7030 LABs 744 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX180KF40I4 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 7030 LABs 744 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX180KF40I4N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Stratix IV GX 7030 LABs 744 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP4SGX230 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Stratix IV Device
EP4SGX230DF29C2NES 制造商:Altera Corporation 功能描述:IC FPGA 372 I/O 780FBGA 制造商:Altera Corporation 功能描述:IC STRATIX IV GX FPGA 780FBGA
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