參數(shù)資料
型號(hào): EP4SE530H40C2
廠商: Altera
文件頁(yè)數(shù): 13/82頁(yè)
文件大?。?/td> 0K
描述: IC STRATIX IV FPGA 530K 1517HBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 3
系列: STRATIX® IV E
LAB/CLB數(shù): 21248
邏輯元件/單元數(shù): 531200
RAM 位總計(jì): 28033024
輸入/輸出數(shù): 976
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 1517-BBGA 裸露焊盤
供應(yīng)商設(shè)備封裝: 1517-HBGA(42.5x42.5)
Chapter 1: DC and Switching Characteristics for Stratix IV Devices
1–12
Electrical Characteristics
March 2014
Altera Corporation
Stratix IV Device Handbook
Volume 4: Device Datasheet and Addendum
I/O Standard Specifications
Table 1–17 through Table 1–22 list the input voltage (VIH and VIL), output voltage
(VOH and VOL), and current drive characteristics (IOH and IOL) for various I/O
standards supported by Stratix IV devices. These tables also show the Stratix IV
device family I/O standard specifications. VOL and VOH values are valid at the
corresponding IOH and IOL, respectively.
For an explanation of terms used in Table 1–17 through Table 1–22, refer to “Glossary”
Table 1–17. Single-Ended I/O Standards
I/O
Standard
VCCIO (V)
VIL (V)
VIH (V)
VOL (V)
VOH (V)
IOL
(mA)
IOH
(mA)
Min
Typ
Max
Min
Max
Min
Max
Min
LVTTL
2.85
3
3.15
-0.3
0.8
1.7
3.6
0.4
2.4
2
-2
LVCMOS
2.85
3
3.15
-0.3
0.8
1.7
3.6
0.2
VCCIO - 0.2
0.1
-0.1
2.5 V
2.375
2.5
2.625
-0.3
0.7
1.7
3.6
0.4
2
1
-1
1.8 V
1.71
1.8
1.89
-0.3
0.35 *
VCCIO
0.65 *
VCCIO
VCCIO +
0.3
0.45
VCCIO -
0.45
2-2
1.5 V
1.425
1.5
1.575
-0.3
0.35 *
VCCIO
0.65 *
VCCIO
VCCIO +
0.3
0.25 *
VCCIO
0.75 *
VCCIO
2-2
1.2 V
1.14
1.2
1.26
-0.3
0.35 *
VCCIO
0.65 *
VCCIO
VCCIO +
0.3
0.25 *
VCCIO
0.75 *
VCCIO
2-2
3.0-V PCI
2.85
3
3.15
0.3 *
VCCIO
0.5 *
VCCIO
3.6
0.1 *
VCCIO
0.9 * VCCIO
1.5
-0.5
3.0-V
PCI-X
2.85
3
3.15
0.35 *
VCCIO
0.5 *
VCCIO
0.1 *
VCCIO
0.9 * VCCIO
1.5
-0.5
Table 1–18. Single-Ended SSTL and HSTL I/O Reference Voltage Specifications
I/O Standard
VCCIO (V)
VREF (V)
VTT (V)
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
SSTL-2
Class I, II
2.375
2.5
2.625
0.49 *
VCCIO
0.5 *
VCCIO
0.51 *
VCCIO
VREF -
0.04
VREF
VREF +
0.04
SSTL-18
Class I, II
1.71
1.8
1.89
0.833
0.9
0.969
VREF -
0.04
VREF
VREF +
0.04
SSTL-15
Class I, II
1.425
1.5
1.575
0.47 *
VCCIO
0.5 *
VCCIO
0.53 *
VCCIO
0.47 *
VCCIO
VREF
0.53 *
VCCIO
HSTL-18
Class I, II
1.71
1.8
1.89
0.85
0.9
0.95
VCCIO/2
HSTL-15
Class I, II
1.425
1.5
1.575
0.68
0.75
0.9
VCCIO/2
HSTL-12
Class I, II
1.14
1.2
1.26
0.47 *
VCCIO
0.5 *
VCCIO
0.53 *
VCCIO
—VCCIO/2
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EP4SE530H40C3ES 功能描述:IC STRATIX IV E 530K 1517-HBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:STRATIX® IV E 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)