參數(shù)資料
型號(hào): EP2AGX45DF29C6
廠商: Altera
文件頁數(shù): 75/90頁
文件大?。?/td> 0K
描述: IC ARRIA II GX FPGA 45K 780FBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 4
系列: Arria II GX
LAB/CLB數(shù): 1805
邏輯元件/單元數(shù): 42959
RAM 位總計(jì): 3517440
輸入/輸出數(shù): 364
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 780-BBGA
供應(yīng)商設(shè)備封裝: 780-FBGA(29x29)
Chapter 1: Device Datasheet for Arria II Devices
1–69
Switching Characteristics
December 2013
Altera Corporation
Table 1–58 lists the DLL frequency range specifications for Arria II GZ devices.
Table 1–59 lists the DQS phase offset delay per stage for Arria II GX devices.
5
270-410
270-380
270-320
36
High
10
6
320-450
320-410
320-370
45
High
8
Note to Table 1–57:
(1) Low indicates a 6-bit DQS delay setting; high indicates a 5-bit DQS delay setting.
Table 1–57. External Memory Interface Specifications for Arria II GX Devices (Part 2 of 2)
Frequency
Mode
Frequency Range (MHz)
Resolution
(°)
DQS Delay
Buffer Mode
(1)
Number of
Delay Chains
C4
I3, C5, I5
C6
Table 1–58. DLL Frequency Range Specifications for Arria II GZ Devices
Frequency Mode
Frequency Range (MHz)
Available Phase Shift
DQS Delay
Buffer Mode
Number of
Delay
Chains
–3
–4
0
90-130
90-120
22.5°, 45°, 67.5°, 90°
Low
16
1
120-170
120-160
30°, 60°, 90°, 120°
Low
12
2
150-210
150-200
36°, 72°, 108°, 144°
Low
10
3
180-260
180-240
45°, 90°,135°, 180°
Low
8
4
240-320
240-290
30°, 60°, 90°, 120°
High
12
5
290-380
290-360
36°, 72°, 108°, 144°
High
10
6
360-450
45°, 90°, 135°, 180°
High
8
7
470-630
470-590
60°, 120°, 180°, 240°
High
6
Note to Table 1–58:
(1) Low indicates a 6-bit DQS delay setting; high indicates a 5-bit DQS delay setting.
Table 1–59. DQS Phase Offset Delay Per Setting for Arria II GX Devices (Note 1), (2), (3)
Speed Grade
Min
Max
Unit
C4
7.0
13.0
ps
I3, C5, I5
7.0
15.0
ps
C6
8.5
18.0
ps
Notes to Table 1–59:
(1) The valid settings for phase offset are -64 to +63 for frequency modes 0 to 3 and -32 to +31 for frequency modes
4 to 5.
(2) The typical value equals the average of the minimum and maximum values.
(3) The delay settings are linear.
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EP2AGX45DF29C6N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Arria II GX 1805 LABs 364 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX45DF29C6NES 制造商:Altera Corporation 功能描述:IC ARRIA II GX FPGA 制造商:Altera Corporation 功能描述:IC ARRIA II GX FPGA 780FBGA
EP2AGX45DF29I3 功能描述:IC ARRIA II GX FPGA 45K 780FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場(chǎng)可編程門陣列) 系列:Arria II GX 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)
EP2AGX45DF29I3N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Arria II GX 1805 LABs 364 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX45DF29I5 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Arria II GX 1805 LABs 364 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256