參數(shù)資料
型號(hào): EP2AGX45DF25C5
廠商: Altera
文件頁數(shù): 55/90頁
文件大?。?/td> 0K
描述: IC ARRIA II GX FPGA 45K 572FBGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 5
系列: Arria II GX
LAB/CLB數(shù): 1805
邏輯元件/單元數(shù): 42959
RAM 位總計(jì): 3517440
輸入/輸出數(shù): 252
電源電壓: 0.87 V ~ 0.93 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 572-FBGA
供應(yīng)商設(shè)備封裝: 572-FBGA
Chapter 1: Device Datasheet for Arria II Devices
1–51
Switching Characteristics
December 2013
Altera Corporation
Deterministic jitter at 3.0 Gbps
(G2)
Pattern = CJPAT
0.35
0.35
UI
Total jitter at 6.0 Gbps (G3)
Pattern = CJPAT
0.25
0.25
UI
Random jitter at 6.0 Gbps (G3)
Pattern = CJPAT
0.15
0.15
UI
SAS Receiver Jitter Tolerance (13)
Total jitter tolerance at 1.5 Gbps
(G1)
Pattern = CJPAT
0.65
0.65
UI
Deterministic jitter tolerance at
1.5 Gbps (G1)
Pattern = CJPAT
0.35
0.35
UI
Sinusoidal jitter tolerance at 1.5
Gbps (G1)
Jitter frequency = 900 KHz to 5
MHz
Pattern = CJTPAT BER = 1E-12
> 0.1
UI
CPRI Transmit Jitter Generation (14)
Total jitter
E.6.HV, E.12.HV
Pattern = CJPAT
0.279
0.279
UI
E.6.LV, E.12.LV, E.24.LV, E.30.LV
Pattern = CJPAT
0.35
0.35
UI
Deterministic jitter
E.6.HV, E.12.HV
Pattern = CJPAT
0.14
0.14
UI
E.6.LV, E.12.LV, E.24.LV, E.30.LV
Pattern = CJPAT
0.17
0.17
UI
CPRI Receiver Jitter Tolerance (14)
Total jitter tolerance
E.6.HV, E.12.HV
Pattern = CJPAT
> 0.66
UI
Deterministic jitter tolerance
E.6.HV, E.12.HV
Pattern = CJPAT
> 0.4
UI
Total jitter tolerance
E.6.LV, E.12.LV, E.24.LV, E.30.LV
Pattern = CJPAT
> 0.65
UI
Deterministic jitter tolerance
E.6.LV, E.12.LV, E.24.LV, E.30.LV
Pattern = CJPAT
> 0.37
UI
Combined deterministic and
random jitter tolerance
E.6.LV, E.12.LV, E.24.LV, E.30.LV
Pattern = CJPAT
> 0.55
UI
OBSAI Transmit Jitter Generation (15)
Total jitter at 768 Mbps, 1536
Mbps, and 3072 Mbps
REFCLK = 153.6 MHz
Pattern CJPAT
0.35
0.35
UI
Deterministic jitter at 768 MBps,
1536 Mbps, and 3072 Mbps
REFCLK = 153.6 MHz
Pattern CJPAT
0.17
0.17
UI
Table 1–41. Transceiver Block Jitter Specifications for Arria II GZ Devices (Note 1), (2) (Part 6 of 7)
Symbol/
Description
Conditions
–C3 and –I3
–C4 and –I4
Unit
Min
Typ
Max
Min
Typ
Max
相關(guān)PDF資料
PDF描述
AMM25DTKD-S288 CONN EDGECARD 50POS .156 EXTEND
170-050-173L000 CONN DB50 CRIMP MALE NICKEL
M1AFS1500-1FG484I IC FPGA 8MB FLASH 1.5M 484-FBGA
RSC49DRAN-S734 CONN EDGECARD 98POS .100 R/A PCB
AFS1500-1FGG484I IC FPGA 8MB FLASH 1.5M 484-FBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP2AGX45DF25C5N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 1805 LABs 252 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX45DF25C6 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 1805 LABs 252 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX45DF25C6ES 制造商:Altera Corporation 功能描述:IC ARRIA II GX FPGA 572FBGA
EP2AGX45DF25C6N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Arria II GX 1805 LABs 252 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP2AGX45DF25I3 功能描述:IC ARRIA II GX FPGA 45K 572FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA(現(xiàn)場可編程門陣列) 系列:Arria II GX 產(chǎn)品變化通告:XC4000(E,L) Discontinuation 01/April/2002 標(biāo)準(zhǔn)包裝:24 系列:XC4000E/X LAB/CLB數(shù):100 邏輯元件/單元數(shù):238 RAM 位總計(jì):3200 輸入/輸出數(shù):80 門數(shù):3000 電源電壓:4.5 V ~ 5.5 V 安裝類型:表面貼裝 工作溫度:-40°C ~ 100°C 封裝/外殼:120-BCBGA 供應(yīng)商設(shè)備封裝:120-CPGA(34.55x34.55)