參數(shù)資料
型號: EP20K600EBC652-3
廠商: Altera
文件頁數(shù): 83/117頁
文件大小: 0K
描述: IC APEX 20KE FPGA 600K 652-BGA
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 12
系列: APEX-20K®
LAB/CLB數(shù): 2432
邏輯元件/單元數(shù): 24320
RAM 位總計: 311296
輸入/輸出數(shù): 488
門數(shù): 1537000
電源電壓: 1.71 V ~ 1.89 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 652-BGA
供應(yīng)商設(shè)備封裝: 652-BGA(45x45)
68
Altera Corporation
APEX 20K Programmable Logic Device Family Data Sheet
All specifications are always representative of worst-case supply voltage
and junction temperature conditions. All output-pin-timing specifications
are reported for maximum driver strength.
Figure 36 shows the fMAX timing model for APEX 20K devices.
Figure 36. APEX 20K fMAX Timing Model
Figure 37 shows the fMAX timing model for APEX 20KE devices. These
parameters can be used to estimate fMAX for multiple levels of logic.
Quartus II software timing analysis should be used for more accurate
timing information.
SU
H
CO
LUT
t
ESBRC
ESBWC
ESBWESU
ESBDATASU
ESBADDRSU
ESBDATACO1
ESBDATACO2
ESBDD
PD
PTERMSU
PTERMCO
t
F1—4
F5—20
F20+
LE
ESB
Routing Delay
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