參數(shù)資料
型號: EP20K400EQI240-2
廠商: ALTERA CORP
元件分類: PLD
英文描述: LOADABLE PLD, PQFP240
封裝: PLASTIC, QFP-240
文件頁數(shù): 21/65頁
文件大?。?/td> 781K
代理商: EP20K400EQI240-2
50
Altera Corporation
APEX 20K Programmable Logic Device Family Data Sheet
Preliminary Information
Figure 16. APEX 20K Parallel Expanders
Embedded
System Block
The ESB can implement various types of memory blocks, including
dual-port RAM, ROM, FIFO, and CAM blocks. The ESB includes input
and output registers; the input registers synchronize writes, and the
output registers can pipeline designs to improve system performance.
The ESB offers a dual-port mode, which supports simultaneous reads and
writes at two different clock frequencies. Figure 17 shows the ESB block
diagram.
Figure 17. ESB Block Diagram
32 Signals from
Local Interconnect
To Next
Macrocell
From
Previous
Macrocell
Product-
Term
Select
Matrix
Product-
Term
Select
Matrix
Macrocell
Product-
Term Logic
Macrocell
Product-
Term Logic
Parallel Expander
Switch
Parallel Expander
Switch
wraddress[]
data[]
wren
inclock
inclocken
inaclr
rdaddress[]
q[]
rden
outclock
outclocken
outaclr
相關(guān)PDF資料
PDF描述
EP20K400EQI240-3 LOADABLE PLD, PQFP240
EP20K400ERC240-1 LOADABLE PLD, PQFP240
EP20K400ERC240-2 LOADABLE PLD, PQFP240
EP20K400ERC240-3 LOADABLE PLD, PQFP240
EP20K400ERI240-1 LOADABLE PLD, PQFP240
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EP20K400FC672-1ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:FPGA
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