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      參數(shù)資料
      型號: EP20K200EFI484-2X
      廠商: Altera
      文件頁數(shù): 27/117頁
      文件大小: 0K
      描述: IC APEX 20KE FPGA 200K 484-FBGA
      產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
      標(biāo)準(zhǔn)包裝: 60
      系列: APEX-20K®
      LAB/CLB數(shù): 832
      邏輯元件/單元數(shù): 8320
      RAM 位總計: 106496
      輸入/輸出數(shù): 376
      門數(shù): 404000
      電源電壓: 1.71 V ~ 1.89 V
      安裝類型: 表面貼裝
      工作溫度: -40°C ~ 100°C
      封裝/外殼: 484-BGA
      供應(yīng)商設(shè)備封裝: 484-FBGA(23x23)
      其它名稱: 544-2093
      Altera Corporation
      17
      APEX 20K Programmable Logic Device Family Data Sheet
      LE Operating Modes
      The APEX 20K LE can operate in one of the following three modes:
      Normal mode
      Arithmetic mode
      Counter mode
      Each mode uses LE resources differently. In each mode, seven available
      inputs to the LE—the four data inputs from the LAB local interconnect,
      the feedback from the programmable register, and the carry-in and
      cascade-in from the previous LE—are directed to different destinations to
      implement the desired logic function. LAB-wide signals provide clock,
      asynchronous clear, asynchronous preset, asynchronous load,
      synchronous clear, synchronous load, and clock enable control for the
      register. These LAB-wide signals are available in all LE modes.
      The Quartus II software, in conjunction with parameterized functions
      such as LPM and DesignWare functions, automatically chooses the
      appropriate mode for common functions such as counters, adders, and
      multipliers. If required, the designer can also create special-purpose
      functions that specify which LE operating mode to use for optimal
      performance. Figure 8 shows the LE operating modes.
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