參數(shù)資料
型號(hào): EP20K200CF484I7ES
英文描述: 256K, 32K x 8 Bit; 5 Volt, Byte Alterable EEPROM; Temperature Range: -40°C to 85°C; Package: 28-CerDIP
中文描述: 專用集成電路
文件頁數(shù): 53/114頁
文件大?。?/td> 1623K
代理商: EP20K200CF484I7ES
Altera Corporation
43
APEX 20K Programmable Logic Device Family Data Sheet
Figure 28 shows how a column IOE connects to the interconnect.
Figure 28. Column IOE Connection to the Interconnect
Dedicated Fast I/O Pins
APEX 20KE devices incorporate an enhancement to support bidirectional
pins with high internal fanout such as PCI control signals. These pins are
called Dedicated Fast I/O pins (FAST1, FAST2, FAST3, and FAST4) and
replace dedicated inputs. These pins can be used for fast clock, clear, or
high fanout logic signal distribution. They also can drive out. The
Dedicated Fast I/O pin data output and tri-state control are driven by
local interconnect from the adjacent MegaLAB for high speed.
Row Interconnect
Column Interconnect
Each IOE can drive column interconnect. In APEX 20KE devices,
IOEs can also drive FastRow interconnect. Each IOE data
and OE signal is driven by local interconnect.
Any LE or ESB can drive
a column pin through a
row, column, and MegaLAB
interconnect.
IOE
LAB
An LE or ESB can drive a
pin through a local
interconnect for faster
clock-to-output times.
MegaLAB Interconnect
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
EP20K200CF484I8 制造商:Altera Corporation 功能描述:IC APEX 20KC FPGA 484FBGA 制造商:Altera Corporation 功能描述:IC FPGA 376 I/O 484FBGA
EP20K200CF484I8ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC
EP20K200CF484I9ES 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC
EP20K200CF672C7 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC
EP20K200CF672C8 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ASIC