參數(shù)資料
型號： EP1K50FC484
廠商： ALTERA CORP
元件分類： PLD
英文描述： LOADABLE PLD, PBGA484
封裝： 23 X 23 MM, 1 MM PITCH, FINE LINE, BGA-484
文件頁數(shù)： 4/84頁
文件大?。?/td> 2224K
代理商： EP1K50FC484
12
Altera Corporation
ACEX 1K Programmable Logic Family Data Sheet
Preliminary Information
EABs can be used to implement synchronous RAM, which is easier to use
than asynchronous RAM. A circuit using asynchronous RAM must
generate the RAM write enable signal, while ensuring that its data and
address signals meet setup and hold time specifications relative to the
write enable signal. In contrast, the EAB’s synchronous RAM generates its
own write enable signal and is self-timed with respect to the input or write
clock. A circuit using the EAB’s self-timed RAM must only meet the setup
and hold time specifications of the global clock.
When used as RAM, each EAB can be configured in any of the following
sizes: 256
× 16; 512 × 8; 1,024 × 4; or 2,048 × 2. Figure 5 shows the ACEX 1K
EAB memory configurations.
Figure 5. ACEX 1K EAB Memory Congurations
Larger blocks of RAM are created by combining multiple EABs. For
example, two 256
× 16 RAM blocks can be combined to form a 256 × 32
block, and two 512
× 8 RAM blocks can be combined to form a
512
× 16 block. Figure 6 shows examples of multiple EAB combination.
Figure 6. Examples of Combining ACEX 1K EABs
256
× 16
512
× 8
1,024
× 4
2,048
× 2
512
× 8
512
× 8
256
× 16
256
× 16
256
× 32
512
× 16
相關PDF資料
PDF描述
EP1K50FI256 LOADABLE PLD, PBGA256
EP1K50FI484 LOADABLE PLD, PBGA484
EP1K50QC208 LOADABLE PLD, PQFP208
EP1K50QI208 LOADABLE PLD, PQFP208
EP1K50TC144 LOADABLE PLD, PQFP144
相關代理商/技術參數(shù)
參數(shù)描述
EP1K50FC484-1 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 360 LABs 249 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K50FC484-1DX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50FC484-1F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
EP1K50FC484-1N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - ACEX 1K 360 LABs 249 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K50FC484-1P 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field Programmable Gate Array (FPGA)
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