參數資料
型號: EP1K100FC484-1N
廠商: Altera
文件頁數: 52/86頁
文件大?。?/td> 0K
描述: IC ACEX 1K FPGA 100K 484-FBGA
產品培訓模塊: Three Reasons to Use FPGA's in Industrial Designs
標準包裝: 60
系列: ACEX-1K®
LAB/CLB數: 624
邏輯元件/單元數: 4992
RAM 位總計: 49152
輸入/輸出數: 333
門數: 257000
電源電壓: 2.375 V ~ 2.625 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 484-BGA
供應商設備封裝: 484-FBGA(23x23)
56
Altera Corporation
ACEX 1K Programmable Logic Device Family Data Sheet
Table 24. EAB Timing Microparameters
Symbol
Parameter
Conditions
tEABDATA1
Data or address delay to EAB for combinatorial input
tEABDATA2
Data or address delay to EAB for registered input
tEABWE1
Write enable delay to EAB for combinatorial input
tEABWE2
Write enable delay to EAB for registered input
tEABRE1
Read enable delay to EAB for combinatorial input
tEABRE2
Read enable delay to EAB for registered input
tEABCLK
EAB register clock delay
tEABCO
EAB register clock-to-output delay
tEABBYPASS
Bypass register delay
tEABSU
EAB register setup time before clock
tEABH
EAB register hold time after clock
tEABCLR
EAB register asynchronous clear time to output delay
tAA
Address access delay (including the read enable to output delay)
tWP
Write pulse width
tRP
Read pulse width
tWDSU
Data setup time before falling edge of write pulse
tWDH
Data hold time after falling edge of write pulse
tWASU
Address setup time before rising edge of write pulse
tWAH
Address hold time after falling edge of write pulse
tRASU
Address setup time before rising edge of read pulse
tRAH
Address hold time after falling edge of read pulse
tWO
Write enable to data output valid delay
tDD
Data-in to data-out valid delay
tEABOUT
Data-out delay
tEABCH
Clock high time
tEABCL
Clock low time
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參數描述
EP1K100FC484-2 功能描述:FPGA - 現場可編程門陣列 FPGA - ACEX 1K 624 LABs 333 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K100FC484-2N 功能描述:FPGA - 現場可編程門陣列 FPGA - ACEX 1K 624 LABs 333 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K100FC484-3 功能描述:FPGA - 現場可編程門陣列 FPGA - ACEX 1K 624 LABs 333 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K100FC484-3N 功能描述:FPGA - 現場可編程門陣列 FPGA - ACEX 1K 624 LABs 333 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數量: 邏輯塊數量:943 內嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1K100FI2562 制造商:Altera Corporation 功能描述: