參數(shù)資料
型號(hào): EP1C6T400C8
廠商: Altera Corporation
英文描述: Cyclone FPGA Family
中文描述: 氣旋FPGA系列
文件頁數(shù): 76/94頁
文件大小: 1138K
代理商: EP1C6T400C8
76
Altera Corporation
Cyclone FPGA Family Data Sheet
Preliminary Information
Figure 37
shows the memory waveforms for the M4K timing parameters
shown in
Table 42
.
Figure 37. Dual-Port RAM Timing Microparameter Waveform
Table 43. Routing Delay Internal Timing Microparameter Descriptions
Symbol
Parameter
t
R4
Delay for an R4 line with average loading; covers a distance
of four LAB columns
Delay for an C4 line with average loading; covers a distance
of four LAB rows
Local interconnect delay
t
C4
t
LOCAL
wrclock
wren
wraddress
data-in
reg_data-out
an-1
an
a0
a1
a2
a3
a4
a5
din-1
din
din4
din5
rdclock
a6
din6
unreg_data-out
rden
rdaddress
bn
b0
b1
b2
b3
doutn-2
doutn-1
doutn
doutn-1
doutn
dout0
t
WERESU
t
WEREH
t
DATACO1
t
DATACO2
t
DATASU
t
DATAH
t
WEREH
t
WERESU
t
WADDRSU
t
WADDRH
dout0
t
RC
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