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參數(shù)資料
| 型號(hào)： | EP1C6T100C6ES |
| 廠商： | Altera Corporation |
| 英文描述： | Cyclone FPGA Family Data Sheet |
| 中文描述： | 氣旋的FPGA系列數(shù)據(jù)手冊(cè) |
| 文件頁(yè)數(shù)： | 61/104頁(yè) |
| 文件大?。?/td> | 763K |
| 代理商： | EP1C6T100C6ES |
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Altera Corporation
January 2007
2–55
Preliminary
Power Sequencing & Hot Socketing
The Cyclone V
CCINT
pins must always be connected to a 1.5-V power
supply. If the V
CCINT
level is 1.5 V, then input pins are 1.5-V, 1.8-V, 2.5-V,
and 3.3-V tolerant. The V
CCIO
pins can be connected to either a 1.5-V, 1.8-V,
2.5-V, or 3.3-V power supply, depending on the output requirements. The
output levels are compatible with systems of the same voltage as the
power supply (i.e., when V
CCIO
pins are connected to a 1.5-V power
supply, the output levels are compatible with 1.5-V systems). When V
CCIO
pins are connected to a 3.3-V power supply, the output high is 3.3-V and
is compatible with 3.3-V or 5.0-V systems.
Table 2–14
summarizes
Cyclone MultiVolt I/O support.
Power
Sequencing &
Hot Socketing
Because Cyclone devices can be used in a mixed-voltage environment,
they have been designed specifically to tolerate any possible power-up
sequence. Therefore, the V
CCIO
and V
CCINT
power supplies may be
powered in any order.
Signals can be driven into Cyclone devices before and during power up
without damaging the device. In addition, Cyclone devices do not drive
out during power up. Once operating conditions are reached and the
device is configured, Cyclone devices operate as specified by the user.
Table 2–14. Cyclone MultiVolt I/O Support
Note (1)
V
CCIO
(V)
Input Signal
Output Signal
1.5 V
v
v
1.8 V
v
v
2.5 V
v
(2)
v
(2)
v
v
(4)
3.3 V
v
(2)
v
(2)
v
v
5.0 V
1.5 V
v
v
(3)
v
(5)
v
(7)
1.8 V
2.5 V
3.3 V
5.0 V
1.5
1.8
v
2.5
v
(5)
v
(7)
v
3.3
v
(6)
v
(7)
v
v
(8)
Notes to
Table 2–14
:
(1)
The PCI clamping diode must be disabled to drive an input with voltages higher than V
CCIO
.
(2)
When V
CCIO
= 1.5-V or 1.8-V and a 2.5-V or 3.3-V input signal feeds an input pin, higher pin leakage current is
expected. Turn on
Allow voltage overdrive for LVTTL / LVCMOS input pins
in the Assignments > Device >
Device and Pin Options > Pin Placement tab when a device has this I/O combinations.
(3)
When V
CCIO
= 1.8-V, a Cyclone device can drive a 1.5-V device with 1.8-V tolerant inputs.
(4)
When V
CCIO
= 3.3-V and a 2.5-V input signal feeds an input pin, the V
CCIO
supply current will be slightly larger
than expected.
(5)
When V
CCIO
= 2.5-V, a Cyclone device can drive a 1.5-V or 1.8-V device with 2.5-V tolerant inputs.
(6)
Cyclone devices can be 5.0-V tolerant with the use of an external resistor and the internal PCI clamp diode.
(7)
When V
CCIO
= 3.3-V, a Cyclone device can drive a 1.5-V, 1.8-V, or 2.5-V device with 3.3-V tolerant inputs.
(8)
When V
CCIO
= 3.3-V, a Cyclone device can drive a device with 5.0-V LVTTL inputs but not 5.0-V LVCMOS inputs.
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PDF描述 |
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| EP1C6T100C7ES | Cyclone FPGA Family Data Sheet |
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| EP1C6T100I6ES | Cyclone FPGA Family Data Sheet |
| EP1C6T100I7ES | Cyclone FPGA Family Data Sheet |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EP1C6T144C6 | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Cyclone I 598 LABs 98 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EP1C6T144C6N | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Cyclone I 598 LABs 98 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EP1C6T144C7 | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Cyclone I 598 LABs 98 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EP1C6T144C7N | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Cyclone I 598 LABs 98 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
| EP1C6T144C8 | 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門陣列 FPGA - Cyclone I 598 LABs 98 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256 |
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