參數(shù)資料
型號(hào)： EP1C6F100C7
廠商： Altera Corporation
英文描述： Cyclone FPGA Family
中文描述： 氣旋FPGA系列
文件頁(yè)數(shù)： 57/94頁(yè)
文件大小： 1138K
代理商： EP1C6F100C7
Altera Corporation
57
Preliminary Information
Cyclone FPGA Family Data Sheet
Advanced I/O Standard Support
Cyclone device IOEs support the following I/O standards:
■
■
■
■
■
■
■
■
■
3.3-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
3.3-V PCI
LVDS
SSTL-2 class I and II
SSTL-3 class I and II
Differential SSTL-2 class II (on output clocks only)
Table 15
describes the I/O standards supported by Cyclone devices.
Notes to
Table 15
:
(1)
EP1C3 devices do not support PCI.
(2)
EP1C3 devices in the 100-pin TQFP package do not support the LVDS I/O standard.
(3)
This I/O standard is only available on output clock pins (
PLL_OUT
pins).
Cyclone devices contain four I/O banks, as shown in
Figure 35
. I/O banks
1 and 3 support all the I/O standards listed in
Table 15
. I/O banks 2 and
4 support all the I/O standards listed in
Table 15
except the 3.3-V PCI
standard. I/O banks 2 and 4 contain dual-purpose DQS, DQ, and DM pins
to support a DDR SDRAM or FCRAM interface. I/O bank 1 can also
support a DDR SDRAM or FCRAM interface, however, the configuration
input pins in I/O bank 1 must operate at 2.5 V. I/O bank 3 can also
support a DDR SDRAM or FCRAM interface, however, all the JTAG pins
in I/O bank 3 must operate at 2.5 V.
Table 15. Cyclone I/O Standards
I/O Standard
Type
Input Reference
Voltage (V
REF
) (V)
Output Supply
Voltage (V
CCIO
)
(V)
Board
Termination
Voltage (V
TT
) (V)
N/A
N/A
N/A
N/A
N/A
N/A
1.25
1.5
1.25
3.3-V LVTTL/LVCMOS
2.5-V LVTTL/LVCMOS
1.8-V LVTTL/LVCMOS
1.5-V LVCMOS
3.3-V PCI
(1)
LVDS
(2)
SSTL-2 class I and II
SSTL-3 class I and II
Differential SSTL-2
(3)
Single-ended
Single-ended
Single-ended
Single-ended
Single-ended
Differential
Voltage-referenced
Voltage-referenced
Differential
N/A
N/A
N/A
N/A
N/A
N/A
1.25
1.5
1.25
3.3
2.5
1.8
1.5
3.3
2.5
2.5
3.3
2.5
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EP1C6F256C6 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1C6F256C6N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1C6F256C7 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1C6F256C7N 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1C6F256C8 功能描述:FPGA - 現(xiàn)場(chǎng)可編程門(mén)陣列 FPGA - Cyclone I 598 LABs 185 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
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