f
參數(shù)資料
型號: EP1C3T144A8N
廠商: Altera
文件頁數(shù): 46/78頁
文件大?。?/td> 0K
描述: IC CYCLONE FPGA 2910 LE 144-TQFP
產(chǎn)品培訓(xùn)模塊: Three Reasons to Use FPGA's in Industrial Designs
標(biāo)準(zhǔn)包裝: 180
系列: Cyclone®
LAB/CLB數(shù): 291
邏輯元件/單元數(shù): 2910
RAM 位總計: 59904
輸入/輸出數(shù): 104
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 144-LQFP
供應(yīng)商設(shè)備封裝: 144-TQFP(20x20)
7–4
Chapter 7: HardCopy II Devices
Pin-Out Information
Altera Corporation
f For more information about the DC characteristics of the industrial-grade
HardCopy II devices, refer to the DC and Switching Specifications and Operating
Conditions chapter in volume 1 of the HardCopy II Device Handbook.
However, the following exceptions apply:
The delay-locked loop (DLL) frequency range is bounded by the minimum
frequencies listed in Table 7–2.
Table 7–2 lists the minimum DLL frequency for each frequency mode.
Non-calibrated on-chip termination (OCT) is bounded by:
±40% for series resistance.
±50% for 1.2-V series resistance.
Hot-socketing DC limit is raised to 350 A.
The I/O fMAX values of automotive-grade HardCopy II devices are 15% lower than
their equivalent industrial-grade HardCopy II devices and correspond to the
commercial-grade Stratix II devices of –5 speed. The I/O fMAX values of the
industrial-grade HardCopy II devices will be updated in a later revision of the
HardCopy II Device Handbook.
f For the maximum I/O clock toggle rate specifications in commercial-grade Stratix II
devices of –5 speed, refer to the DC and Switching Characteristics chapter in volume 1 of
the Stratix II Device Handbook.
For LVDS I/O of 2.5 V, the minimum VOCM is 1.1 V and the minimum differential
output voltage (VOD) is 240 mV.
Pin-Out Information
f For more information about the HardCopy II device pin-outs, refer to the
Table 7–2. Minimum DLL Frequency
Mode
Frequency (MHz)
Frequency Mode 0
120
Frequency Mode 1
170
Frequency Mode 2
220
Frequency Mode 3
270
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EP1C3T144C6 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Cyclone I 291 LABs 104 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1C3T144C6ES 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Cyclone FPGA Family Data Sheet
EP1C3T144C6N 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Cyclone I 291 LABs 104 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1C3T144C7 功能描述:FPGA - 現(xiàn)場可編程門陣列 FPGA - Cyclone I 291 LABs 104 IOs RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 柵極數(shù)量: 邏輯塊數(shù)量:943 內(nèi)嵌式塊RAM - EBR:1956 kbit 輸入/輸出端數(shù)量:128 最大工作頻率:800 MHz 工作電源電壓:1.1 V 最大工作溫度:+ 70 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-256
EP1C3T144C7ES 制造商:ALTERA 制造商全稱:Altera Corporation 功能描述:Cyclone FPGA Family Data Sheet