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參數(shù)資料
| 型號(hào)： | EP1100HSETTTSL-FREQ-CL225 |
| 廠商： | ECLIPTEK CORP |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 1 MHz - 27 MHz, TTL OUTPUT |
| 封裝： | HALF SIZE, DIP-4 |
| 文件頁(yè)數(shù)： | 1/2頁(yè) |
| 文件大?。?/td> | 176K |
| 代理商： | EP1100HSETTTSL-FREQ-CL225 |
MANUFACTURER
CATEGORY
SERIES
PACKAGE
VOLTAGE
CLASS
REV
.DATE
ECLIPTEK CORP.
OSCILLATOR
EP11
8 pin DIP
5.0V
OS45
06/00
EP11 Series
EPO TM Programmable Oscillators
5.0V supply voltage
HCMOS/TTL output
8 pin DIP package
Stability to 50ppm
Custom lead length,
gull wing options available
H
5.6
L 13.2
W 13.2
OSCILLATOR
EP11
ELECTRICAL SPECIFICATIONS
Frequency Range
Operating Temperature Range
Storage Temperature Range
Supply Voltage (V
DD)
Input Current
Disable Current (TS Option)
Standby Current (PD Option)
Frequency Tolerance / Stability
Output Voltage Logic High (V
OH)
Output Voltage Logic Low (V
OL)
Rise Time / Fall Time
Duty Cycle
Load Drive Capability /
Output Type-HCMOS
Load Drive Capability /
Output Type-TTL
Pin 1 Connection
Pin 1 Input Voltage
Aging (at 25°C)
Start Up Time
Period Jitter: Absolute
Period Jitter: One Sigma
Inclusive of Operating Temp Range, Supply Voltage, and Load
w/TTL Load
w/HCMOS Load
w/TTL Load or w/HCMOS Load
0.8V
DC to 2.0 VDC w/TTL Load or 20% to 80% of Waveform
w/HCMOS Load
at 1.4V
DC w/TTL Load; at 50% of waveform w/HCMOS Load
at 1.4V
DC w/TTL Load (<27.000MHz only), or
at 50% of waveform w/HCMOS Load (<50.000MHz only)
<50.000MHz
>50.000MHz
<40.000MHz
>40.000MHz
TS
PD
V
IH: No Connection or >2.0VDC
V
IL: (TS Option) <0.8VDC
V
IL: (PD Option) <0.8VDC
<33.000MHz
>33.000MHz
<33.000MHz
>33.000MHz
1.000MHz to 125.000MHz
-20°C to 70°C or -40°C to 85°C
-55°C to 125°C
5.0V
DC ±10%
45mA Maximum (Unloaded)
30mA Maximum (Pin 1=Ground)
50A Maximum (Pin 1=Ground)
±100ppm or ±50ppm Maximum
2.4V
DC Minimum
I
OH=-16mA
V
DD-0.4VDC Minimum IOH=-16mA
0.4V
DC Maximum
I
OL=+16mA
4 nSeconds Maximum
50 ±10(%) (Standard)
50 ±5(%) (Optional)
50pF HCMOS Load Maximum
15pF HCMOS Load Maximum
10TTL Load Maximum
5TTL Load Maximum
Tri-State
Power Down
Enables Output
Disables Output: High Impedence
Disables Output: Logic Low
±5ppm / year Maximum
10 mSeconds Maximum
±250pSec Maximum, ±100pSec Typical
±100pSec Maximum, ±50pSec Typical
±50pSeconds Maximum
±30pSeconds Maximum
800-ECLIPTEK www.ecliptek.com for latest revision
56
Specifications subject to change without notice.
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