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參數(shù)資料
| 型號(hào)： | EMCL23C2J-187.500M |
| 廠商： | ECLIPTEK CORP |
| 元件分類： | XO, clock |
| 英文描述： | CRYSTAL OSCILLATOR, CLOCK, 187.5 MHz, LVPECL OUTPUT |
| 封裝： | ROHS COMPLIANT, PLASTIC, SMD, 6 PIN |
| 文件頁(yè)數(shù)： | 3/5頁(yè) |
| 文件大?。?/td> | 203K |
| 代理商： | EMCL23C2J-187.500M |
EMCL23C2J-187.500M
OUTPUT STANDBY
(HIGH IMPEDANCE
STATE)
OUTPUT WAVEFORM & TIMING DIAGRAM
VOH
VOL
80%
50%
20%
Fall
Time
Rise
Time
TW
T
Duty Cycle (%) = TW/T x 100
VIH
VIL
tPLZ
tPZL
CLOCK
OUTPUTS
TRI-ST
A
TE
INPUT
Q
Pin Connections
1 Tri-State
2 No Connect
3 Ground
4 Output
5 Complementary Output
6 Supply Voltage (VDD)
Power
Supply
Power
Supply
Power
Supply
Power
Supply
Oscilloscope
Probe 2
(Note 2)
Probe 1
(Note 2)
Current
Meter
Voltage
Meter
Frequency
Counter
Switch
0.01F
(Note 1)
0.1F
(Note 1)
50 Ohms
Supply
Voltage
(VDD)
Tri-State
Complementary
Output
No
Connect
Ground
50 Ohms
Note 1: An external 0.01F ceramic bypass capacitor in parallel with a 0.1F high frequency ceramic bypass capacitor close (less than 2mm)
to the package ground and supply voltage pin is required.
Note 2: A low capacitance (<12pF), 10X attenuation factor, high impedance (>10Mohms), and high bandwidth (>500MHz) passive probe is
recommended.
Note 3: Test circuit PCB traces need to be designed for a characteristic line impedance of 50 ohms.
Test Circuit for Tri-State and Complementary Output
www.ecliptek.com | Specification Subject to Change Without Notice | Rev A 3/12/2011 | Page 3 of 5
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