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參數(shù)資料
| 型號： | EM78P5830AAP |
| 廠商： | ELAN Microelctronics Corp . |
| 英文描述： | 8-BIT MICRO-CONTROLLER |
| 中文描述： | 8位微控制器 |
| 文件頁數(shù)： | 13/43頁 |
| 文件大?。?/td> | 396K |
| 代理商： | EM78P5830AAP |
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EM785830AA
8-bit Micro-controller
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
12/1/2004 V1.6
Fig.5 SPI structure
SPIC reg. : SPI control register
SDO: Serial data out
SDI: Serial data in
SCK: Serial clock
RBF : Set by buffer full detector, and reset in software.
RBFI : Interrupt flag. Set by buffer full detector, and reset in software.
Buffer Full Detector : Sets to 1, while an 8-bit shifting is complete.
SE : Loads the data in SPIW register, and begin to shift
SPIE : SPI control register
SPIS reg. : Shifting byte out and in.
The MSB will be shifted first. Both the SPIS register and the SPIW register are loaded at the same time. Once
data being written to, SPIS starts transmission / reception. The received data will be moved to the SPIR
register, as the shifting of the 8-bit data is complete. The RBF (Read Buffer Full ) flag and the RBFI(Read
Buffer Full Interrupt) flag are set.
SPIR reg. : Read buffer.
The buffer will be updated as the 8-bit shifting is complete. The data must be read before the next reception is
finished. The RBF flag is cleared as the SPIR register read.
SPIW reg. : Write buffer.
The buffer will deny any write until the 8-bit shifting is complete. The SE bit will be kept in 1 if the
communication is still under going. This flag must be cleared as the shifting is finished. Users can determine if
the next write attempt is available.
SBR2 ~ SBR0: Programming the clock frequency/rates and sources.
Clock select : Selecting either the internal instruction clock or the external 16.338KHz clock as the shifting clock.
Edge Select : Selecting the appropriate clock edges by programming the SCES bit
SPIS reg.
Read
R5
Write
R5
SPIR reg.
Edge
Select
shift right
bit 0
bit 7
Prescaler
4, 8, 16, 32, 64, 128
PORT62
PORT61
SCK
T
sco
16.38kHz
SBR2~SBR0
3
Clock Select
2
Noise
Filter
SPIC reg. (R4 page1)
SBR0 ~SBR2
RBF
RBFI
Buffer Full Detector
set to 1
SPIWC
SDO
SPIE
SDI
MUX
SPIE
0
PORT60
MUX
SCK
SPIE
3
SPIW reg.
Edge
Select
MUX
SDI/P74
SDO/P75
SCK/P76
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