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EM785830AA
8-bit Micro-controller
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* This specification is subject to be changed without notice.
12/1/2004 V1.6
XI. AC Electrical Characteristic
CPU instruction timing (Ta = 25
°
C, AVDD=VDD=5V, VSS=0V)
Parameter
Input CLK duty cycle
Instruction cycle time
Symbol
Dclk
Tins
Condition
32.768kHz
3.582MHz
Note 1
Ta = 25
°
C
Min
45
Typ
50
60
550
16
16
Max
55
Unit
%
us
ns
ms
ns
ms
Device delay hold time
TCC input period
Watchdog timer period
Note 1: N= selected prescaler ratio.
ADC characteristic (VDD = 5V, Ta = +25
°
C, for internal reference voltage)
Parameter
Upper bound offset voltage
Lower bound offset voltage
*These parameters are characterized but not tested.
* About ADC characteristic, please refer to next page.
Timing characteristic (AVDD=VDD=5V,Ta=+25
°
C)
Description
Oscillator timing characteristic
OSC start up
SPI timing characteristic (CPU clock 3.58MHz and Fsco = 3.58Mhz /2)
/SS set-up time
/SS hold time
SCLK high time
SCLK low time
SCLK rising time
SCLK falling time
SDI set-up time to the reading edge of SCLK
SDI hold time to the reading edge of SCLK
SDO disable time
Timing characteristic of reset
The minimum width of reset low pulse
The delay between reset and program start
Tdrh
Ttcc
Twdt
(Tins+20)/N
Symbol
Vofh
Vofl
Condition
Min
Typ
44
32
Max
52.8
38.4
Unit
mV
mV
Symbol
Min
Typ
Max
Unit
32.768kHz
3.579MHz PLL
Toscs
400
1500
10
ms
us
5
Tcss
Tcsh
Thi
Tlo
Tr
Tf
Tisu
Tihd
Tdis
560
250
250
250
25
25
15
15
30
30
560
ns
ns
ns
ns
ns
ns
ns
ns
Trst
Tdrs
3
uS
mS
18