參數(shù)資料
型號: EM78450
英文描述: Dual Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP; Temperature Range: 0&degC to 70°C; Package: 16-QFN
中文描述: 8位微控制器的通用產(chǎn)品
文件頁數(shù): 19/57頁
文件大?。?/td> 854K
代理商: EM78450
EM78458/459
MASK ROM
This specification is subject to change without prior notice.
2002/03/01
26
IOW RF
ENI (or DISI)
; Enable (or disable) global interrupt
SLEP
; Sleep
NOP
Similarly, if the Comparator High Interrupt is used to wake up the EM78458/459 (as in Case [c] above),
the following instructions must be executed before SLEP:
MOV A, @0Bxx000110
; Select internal TCC clock
CONTW
CLR R1
; Clear TCC and prescaler
MOV A, @0Bxxxx1110
; Select WDT prescaler
CONTW
WDTC
; Clear WDT and prescaler
MOV A, @0B0xxxxxxx
; Disable WDT
IOW RE
MOV A, @0B01xxxxxx
; Enable comparator high interrupt
IOW RF
ENI (or DISI)
; Enable (or disable) global interrupt
SLEP
; Sleep
NOP
One problem user must be aware of, is that after waking up from the sleep mode, the WDT function
will enable automatically. The WDT operation (being enabled or disabled) should be handled
appropriately by software after waking up from the sleep mode.
2. The Status of T, and P of STATUS Register
A RESET condition is initiated by one of the following events:
(1) A power-on condition,
(2) A high-low-high pulse on /RESET pin, or
(3) Watchdog Timer time-out.
The values of T and P, as listed in Table 5 below, are used to check how the processor wakes up.
Table 6 shows the events, which may affect the status of T and P.
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