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參數(shù)資料
| 型號： | EM73400 |
| 廠商： | ELAN Microelctronics Corp . |
| 英文描述： | 4-Bit Micro-Controller for General-Purpose Product(用于通訊產(chǎn)品，家用電器，消費(fèi)類產(chǎn)品的工作電壓4.5-5.5V的4位微控制器) |
| 中文描述： | 4位微控制器一般通用產(chǎn)品（用于通訊產(chǎn)品，家用電器，消費(fèi)類產(chǎn)品的工作電壓4.5 - 5.5V的的4位微控制器） |
| 文件頁數(shù)： | 21/38頁 |
| 文件大小： | 197K |
| 代理商： | EM73400 |
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21
* This specification are subject to be changed without notice.
6.11.1998
EM73400
4-BIT MICRO-CONTROLLER FOR GENERAL PURPOSE PRODUCT
NOTE: When user setting the transfer mode or type, The “STC” must be “0”, it means that user can not change
the SIO setting during the SIO processing.
PORT 14 is the SIO status port, User can check the SIO processing condition by this port .
Port 14
3
2
1
x
0
x
SIOS SIOSS
SIOS
0
1
SIO status
SIO stop working
SIO still working
SIOSS
0
1
SIO shift status
SIO bit shift stop working
SIO bit shift still in processing
PORT 15 is the SIO data buffer .
For transmit mode, user must put the transfer data into P15 before SIO start to transfer data out .
For receive mode, user can get the receive data from P15 after SIO transfer finished .
SIO transfer clock:
User can choose transfer clock source by P31, there are two kinds of SIO transfer clock sources which is in/
out by P9.2/SCK.
Internal clock : Internal clock source is come from the CPU timing generator, it is changed by XIN (system
clock ) setting.
Internal clock rate: fc/2
7
External clock: External clock source is come from the outside system . For the CPU executes the SIO function,
the high level and the low level of external clock must be 2 instruction cycles at least . so the
SIO status flag SIOS, SIOSS will be available after 2 instruction cycles.
SIO bit shift edge type:
For transmit mode, there is only one shift type, leading edge shift will be supported .
For receive mode, there are two shift type, leading and trailing edge shift will be supported .
1. Leading edge shift mode:
Every bit of SIO data is shifted by the leading edge of serial clock (falling edge of SCK)
Leading edge shift mode
2. Trailing edge shift mode:
Every bit of SIO data is shifted by the trailing edge of serial clock ( risinging edge of SCK )
Trailing edge shift mode
SCK
Data shift position
SCK
Data shift position
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