參數(shù)資料
型號(hào): EM6640TP16A
英文描述: Advanced Synchronous Rectified Buck MOSFET Drivers with Pre-POR OVP; Temperature Range: -40°C to 85°C; Package: 10-DFN
中文描述: 微控制器
文件頁(yè)數(shù): 60/62頁(yè)
文件大?。?/td> 620K
代理商: EM6640TP16A
EM6640
03/02 REV. C/446
Copyright
2002, EM Microelectronic-Marin SA
7
www.emmicroelectronic.com
4.1 Power-Up
At power on, the voltage regulator starts to follow the supply voltage and triggers the power on reset circuitry, and
thus the System Reset. The CPU of the EM6640 remains in the reset state for the ‘CPU Reset Delay’, to allow
the oscillator to stabilize after power up.
Because the oscillator is disabled during SLEEP mode, then when waking up from SLEEP mode, the CPU of the
EM6640 remains in the reset state for the ‘CPU Reset Delay’ also to allow the oscillator to stabilize.
The ‘CPU Reset Delay’ is 512 system clocks (ck[11]) long.
VD D
Vreg L o g
RC o s c
nP O R
Ck [1 1 ]
Sy s tem R es et
CP U Res et
1
2
3
W h en V reg Lo g lev el reac h es ap prox. 1.3 v , th e po w er o n res et c irc uit
rem o ves n P O R .
T h e o s c illa to r s ta rts to ru n to s u p p ly a c lo c k s ig n a l to th e res et
s y n c hron is er an d th e pres c a ler b loc k s . A f ter 16 os c illa tor c lo c k c y c les ,
th e sys tem R eset is rem o ved .
A f ter 5 1 2 o scilla to r clo c k c ycles , th ere is a f a llin g ed g e o f ck [1 1 ] a n d th e
CP U Res et is rem o v ed .
1
2
3
Figure 6 Power On Startup
S y stem R eset
CP U Reset
1
2
1
2
R eset so u rce: P o rtA reset,
dig ita l w atchdog , os cillation
detec tion circ uit.
R eset so u rce: P O R , sleep ,
sleep cou nter reset (S C R ).
CP U Reset Delay
Figure 7 CPU Reset Delay (Coldstart)
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