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| 型號(hào)： | EM6605SO24B |
| 英文描述： | Microcontroller |
| 中文描述： | 微控制器 |
| 文件頁數(shù)： | 9/39頁 |
| 文件大小： | 675K |
| 代理商： | EM6605SO24B |
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EM6603
03/02 REV. G/439
Copyright
2002, EM Microelectronic-Marin SA
17
www.emmicroelectronic.com
Table 24 shows the selection of inputs to the Timer/Event counter.
Table 24.Timer Clock Selection
TEC2
TEC1
TEC0
Timer/Counter clock source
0
not active
0
1
2048 Hz from prescaler
0
1
0
512 Hz from prescaler
0
1
128 Hz from prescaler
1
0
32 Hz from prescaler
1
0
1
8 Hz from prescaler
1
0
1 Hz from prescaler
1
PA3 input terminal (see tables 28 and 29)
8.1 Timer/Counter registers
Table 25.Timer control register - TimCtr
Bit
Name
Reset
R/W
Description
3
TimAuto
0
R/W
Timer/Counter AUTO reload
2
TEC2
0
R/W
Timer/Counter mode 2
1
TEC1
0
R/W
Timer/Counter mode 1
0
TEC0
0
R/W
Timer/Counter mode 0
Table 26.LOW Timer Load/Status register - LTimLS (4 low bits)
Bit
Name
Reset
R/W
Description
3
TL3/TS3
0
R/W
Timer load/status bit 3
2
TL2/TS2
0
R/W
Timer load/status bit 2
1
TL1/TS1
0
R/W
Timer load/status bit 1
0
TL0/TS0
0
R/W
Timer load/status bit 0
Table 27.HIGH Timer Load/Status register - HTimLS (4 high bits)
Bit
Name
Reset
R/W
Description
3
TL7/TS7
0
R/W
Timer load/status bit 7
2
TL6/TS6
0
R/W
Timer load/status bit 6
1
TL5/TS5
0
R/W
Timer load/status bit 5
0
TL4/TS4
0
R/W
Timer load/status bit 4
Table 28.PA3 counter input selection register - PA3cnt
bit
Name
Reset
R/W
Description
3
-
empty
2
-
empty
1
Fout
0
R/W
System freq. output on STB/RST pad
0
PA3cntin
0
R/W
PA3 input status
Table 29.PA3 counter input selection
PA3cntin
debPAN
IRQedgeR Counter source
0
X
PA3 debounced rising edge
1
0
PA3 debounced falling edge
1
0
1
PA3 debounced rising edge
1
0
PA3 not debounced falling edge
1
PA3 not debounced rising edge
X ( Don’t care)
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