參數(shù)資料
型號: EM6605SO24A
英文描述: Microcontroller
中文描述: 微控制器
文件頁數(shù): 11/39頁
文件大?。?/td> 675K
代理商: EM6605SO24A
EM6603
03/02 REV. G/439
Copyright
2002, EM Microelectronic-Marin SA
19
www.emmicroelectronic.com
Table 31.register - CIRQD
Bit
Name
Reset
R/W
Description
3
RESERVED
-
2
RESERVED
-
1
DebCK
0
R/W
Debouncer clock select (0=2ms : 1=16ms)
0
INTEN
0
R/W
Enable interrupt to CPU (1=enabled)
Figure 11.Interrupt Request generation
IRQ mask bit which can be written to 0 or 1 (1 to enable an interrupt)
interrupt request flag which is set on the input rising edge.
Timer IRQ flag INTTE and prescaler IRQ flag INTPR arrive independent of their mask bits not to loose any
timing information. But the
processor will be interrupted only with mask set to 1.
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