
1
Stock No. 23144-B 3/01
Advance - Subject to Change Without Notice
EM512D16
Advance Information
NanoAmp Solutions, Inc.
1982 Zanker Road, San Jose, CA 95112
ph: 408-573-8878, FAX: 408-573-8877
www.nanoamp.com
EM512D16
512Kx16 bit Ultra-Low Power Asynchronous Static RAM
Overview
The EM512D16 is an integrated memory device
containing a low power 8 Mbit Static Random
Access Memory organized as 524,288 words by 16
bits. The base design is the same as NanoAmp’s
standard low voltage version, EM512W16. The
device is fabricated using NanoAmp’s advanced
CMOS process and high-speed/ultra low-power/
low-voltage circuit technology. The device pinout is
compatible with other standard 512K x 16 SRAMs.
The device is designed such that a creative user
can improve system power and performance
parameters through use of it’s unique page mode
operation.
FIGURE 1: Pin Configuration
A
Features
Vccq - 2.3 to 3.6 Volts
Vcc - 1.7 to 2.2 Volts
Extended Temperature Range:
-40 to +85
o
C
Fast Cycle Time:
Random Access
< 70 ns
Page Mode
< 25 ns
Very Low Operating Current:
I
CC
< 5 mA typical at 2V, 10 Mhz
Very Low Standby Current:
I
SB
< 2 uA
@ 55
o
C
16 Word Fast Page-Mode Operation
48-Pin BGA or Known Good Die available
TABLE 1: Pin Descriptions
Dual Voltage for Optimum Performance:
LB
OE
A
0
A
1
A
2
CE2
I/O
8
UB
A
3
A
4
CE1
I/O
0
I/O
9
I/O
10
A
5
A
6
I/O
1
I/O
2
V
SS
I/O
11
A
17
A
7
I/O
3
V
CC
V
CCQ
I/O
12
NC
A
16
I/O
4
V
SS
I/O
14
I/O
13
A
14
A
15
I/O
5
I/O
6
I/O
15
NC
A
12
A
13
WE
I/O
7
A
18
A
8
A
9
A
10
A
11
NC
48 Pin BGA (top)
B
C
D
E
F
G
H
1 2 3 4 5 6
Pin Name
A
0
-A
18
WE
CE1, CE2
OE
UB
LB
I/O
0
-I/O
15
V
CC
V
CCQ
V
SS
NC
Pin Function
Address Inputs
Write Enable Input
Chip Enable Inputs
Output Enable Input
Upper Byte Enable Input
Lower Byte Enable Input
Data Inputs/Outputs
Power
Power I/O pins only
Ground
Not Connected
FIGURE 1: Typical Operating Envelope (Serial R/W Mix)
12.5
10.0
7.5
5.0
2.5
0.0
T
C
Operating Frequency (Mhz)
0 2.5 5.0 7.5 10.0 12.5 15.0
2.0 Volts