參數(shù)資料
型號(hào): EM4022V15WS11
英文描述: 5V or 12V Single Synchronous Buck Pulse-Width Modulation (PWM) Controller; Temperature Range: 0&degC to 70°C; Package: 10-DFN
中文描述: 模擬雜項(xiàng)
文件頁(yè)數(shù): 9/15頁(yè)
文件大?。?/td> 277K
代理商: EM4022V15WS11
Copyright
2002, EM Microelectronic-Marin SA
3
www.emmicroelectronic.com
EM4022
Absolute Maximum Ratings
Parameter
Symbol
Conditions
Maximum AC peak current
induced on COIL1 and
COIL2
I COIL
± 30 mA
Maximum DC voltage
induced between M and VSS
VM
(note1)
5 V
Maximum DC current
supplied into M
IM
(note1)
60 mA
Power supply
VDD - VSS
-0.3 to VM
Max. voltage other pads
Vmax
VDD + 0.3 V
Min. voltage other pads
Vmax
VSS - 0.3 V
Storage temperature
TSTORE
-55 to +125
oC
Electrostatic discharge
maximum to MIL-STD-883C
method 3015
VESD
1000 V
note1) whatever is reached first
Stresses above these listed maximum ratings may cause
permanent damage to the device. Exposure beyond
specified operating conditions may affect device
reliability or cause malfunction.
Handling Procedures
This device has built-in protection against high static
voltages or electric fields; however, due to the unique
properties of this device, anti-static precautions should
be taken as for any other CMOS component. Unless
otherwise specified, proper operation can only occur
when all the terminal voltages are kept within the supply
voltage range.
Operating Conditions
Parameter
Symbol Min Typ Max Units
Operating temperature TA
-40
+85
oC
Maximum coil current
ICOIL
-10
10
mA
AC voltage on coil*
VCOIL
15
Vpp
DC voltage on M*
VM
3.5
V
* The AC voltage on the coil and the DC voltage at pad
M are limited by the on-chip shunt regulator loaded at
ICOIL in table 3
Electrical Characteristics
VSUPPLY between 2.0 V and 3.0 V, TA = 25
OC, unless otherwise specified.
Parameter
Symbol Test conditions
Min
Typ
Max Units
Supply voltage (VDD - VSS)VSUPPLY
VPONR +100mV
VM
V
Regulated voltage
VM
IM = 50 mA
3.3
4
4.7
V
Oscillator frequency
FOSC
VSUPPLY = 3 V
92
125
160
kHz
Power-on reset threshold
VPONR
VSUPPLY rising
0.9
1.4
1.8
V
Power-on reset threshold
VPONF
VSUPPLY falling
0.7
1.2
1.6
V
Power-on reset hysteresis
VPHYS
80
160
240
mV
GAP input time constant
TGAP
Extrapolated with an external
capacitor of 64nF
0.4
s
Modulation transistor ON resistance
RON
VSUPPLY = 3 V
48
Resonance capacitor
CR
f = 100KHz, 100mVpp
106.7
110 113.3
pF
Supply capacitor
CSUP
f = 100KHz, 100mVpp
140
pF
Current consumption in modulation state IMOD
VSUPPLY = 2 V
69
13
A
Shunt Regulator current consumption
ISHUNT
VSUPPLY = 2V
200
500
nA
Gap pull-up current consumption
IGAP
VGAP = 0V, VSUPPLY = 2V
1.8
5
7
A
Dynamic current consumption
IDYN
fOSC = 128KHz, VSUPPLY = 2V
3.5
5
6.5
A
Timing Characteristics
1) All timings are derived from the on-chip oscillator.
2) The minimum low frequency GAP width for a single chip is 1 bit at its own clock frequency. The reader must however
allow for the spread in clock frequencies possible in a group of tags. Therefore the minimum width of the GAP in MUTE
and WAKE-UP signals must be 1.5 bits. High frequency GAPs can be arbitrarily.
3) The maximum GAP width for a single chip is 6 bits at its own clock frequency. The reader must however allow for the
spread in clock frequencies possible in a group of tags. Therefore the maximum width of the GAP in MUTE and WAKE-UP
signals must be 5 bits.
Parameter
Symbol Test conditions
Min
Typ
Max Units
High frequency GAP width
THFGAP
50
ns
High frequency ACK GAP width
WHFACK
6bit
High frequency MUTE and WAKE-UP GAP width
WHFMUTE
5bit
Low frequency ACK GAP width
WLFGAP
1.0
2
6
bit
Low frequency MUTE and WAKE-UP GAP width
WLFACK
1.5
2
5
bit
GAP separation in WAKE-UP signal
WLFMUTE
1.5
2
5
bit
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