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參數(shù)資料
| 型號： | EL9115ILZ-T13 |
| 廠商： | INTERSIL CORP |
| 元件分類： | 消費家電 |
| 英文描述： | Triple Analog Video Delay Line |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC20 |
| 封裝： | 5 X 5 MM, ROHS COMPLIANT, PLASTIC, MO-220, QFN-20 |
| 文件頁數(shù)： | 8/9頁 |
| 文件大?。?/td> | 581K |
| 代理商： | EL9115ILZ-T13 |
8
FN7441.2
September 8, 2005
Test Pins
Three test pins are provided (Test R, Test G, Test B) during
normal operation the test pins output pulses of current for a
duration of the overlap between the inputs as shown in
Figure 14:
Test_R pulse = Red out (A) wrt Green out (B)
Test_G pulse = Green out wrt Blue out
Test_B pulse = Blue out wrt Red out
Averaging the current gives a direct measure of the delay
between the two edges. When A precedes B the current
pulse is +50μA, and the output voltage goes up. When B
precedes A the pulse is –50μA.
For the logic to work correctly A and B must have a period of
overlap whilst they are high. I.e. a delay longer than the
pulse width cannot be measured.
The signals A and B are derived from the video input by
comparing the video signal with a slicing level which is set by
an internal DAC. This enables the delay to be measured
either from the rising edges of sync-like signals encoded on
top of the video or from a dedicated set-up signal. The
outputs can be used to set the correct delays for the signals
received.
The DAC level is set through the serial input by bits 1-4
directed to the test register (00).
Test Mode
Bit zero of the test register is set to 0 for normal operation. If
it is set to 1 then the device is in test mode. In Test Mode the
DAC voltage is directed to the Green channel output whilst
for the Red and Blue channels, the test outputs are now
pulses of current which are generated by looking at the delay
between the input and output of the channel. They thus
enable the delay to be measured.
NOTES:
Test Register word = 000wxyzt
If t = 1 test mode else normal
wxyz fed to DAC. z is LSB
TABLE 2.
wxyz
DAC/mV
1000
-400
1001
-350
1010
-300
1011
-250
1100
-200
1101
-150
1110
-100
1111
-50
0000
0
0001
50
0010
100
0011
150
0100
200
0101
250
0110
300
0111
350
FIGURE 14. DELAY DETECTOR
EL9115
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