參數(shù)資料
型號: EL9110IUZ-T13
廠商: INTERSIL CORP
元件分類: 通用總線功能
英文描述: Differential Receiver/Equalizer
中文描述: LINE RECEIVER, PDSO16
封裝: ROHS COMPLIANT, PLASTIC, QSOP-16
文件頁數(shù): 7/8頁
文件大?。?/td> 233K
代理商: EL9110IUZ-T13
7
operation it is anticipated the X2 mode will be selected and
the output load will be back matched. A unity gain to the
output load will then be achieved with a gain control voltage
of about 0.35V. This allows the gain to be trimmed up or
down by 6dB to compensate for any gain/loss errors that
affect the contrast of the video signal. Figure 12 shows an
example plot of the gain to the load with gain control voltage.
FIGURE 12. VARIATION OF GAIN WITH GAIN CONTROL
VOLTAGE
Circuit and Layout Recommendation
The interconnection cable is a transmission line therefore for
proper function it should be treated like transmission line, a
refection-free termination is necessary.
A reflection-free termination is a real "ohmic" resistor with as
less as possible reactive parasitic.
The traces of the layout, up to the point where of the
termination resistor placed, are part of the transmission line
which also includes the cable's connector. A connector with
a better controlled impedance is an obligation for good
picture quality. The termination resistor should be placed
close to the inputs of the device's pins (pin 3 and pin 4.) The
small capacitance differential and common mode
capacitance of the input pins of the device makes it possible
to connect parallel to the termination resistor.
The cable will work as an antenna for all the RF spectrum
which is "in the air" where the cable is used. The spectrum,
particularly its common mode components, could and will
contain high energy level of transients which are above the
built-in protection level of the device and easily could
damage its inputs. Using a transient protection circuit
according to the given application is recommended.
Since the used signal's bandwidth is in the range of 100MHz,
for layout and power supply bypassing the roles of RF
design should be applied.
The following picture is taken from the DB9110 demo-
board's layout. For better visibility the ground plain is
removed.
The ground plane is shown in the following picture.
FIGURE 13. DEMO BOARD LAYOUT
The accompanying circuit diagram looks like:
FIGURE 14. CIRCUIT DIAGRAM
0
0.8
V
GAIN
0.4
1
2
1.8
1.4
1
0.6
0.4
G
0.6
0.2
1.6
1.2
0.8
1
2
3
4
16
15
14
13
5
6
7
12
11
10
8
9
CTRL
_REF
VCTRL
VINP
VINM
VS-
CMOUT
VGAIN
LOGIC
_REF
CMEXT
VS+
ENBL
VSA+
VOUT
VSA-
0V
X2
R
11
330
C
5
1μF
R
6
R
7
R
9
R
5
C
10
1μF
R
12
330
C
9
1μF
C
8
1nF
C
11
1nF
C
7
1μF
C
6
1nF
TP7
EL9110
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