參數(shù)資料
型號: EL7563C
英文描述: Monolithic 4 Amp DC:DC Converter(4A,單片DC:DC步降轉(zhuǎn)換器)
中文描述: 單片4安培直流:DC轉(zhuǎn)換器(4A條,單片直流:直流步降轉(zhuǎn)換器)
文件頁數(shù): 2/17頁
文件大?。?/td> 345K
代理商: EL7563C
10
EL7563C
Monolithic 4 Amp DC:DC Buck Converter
E
L
7563C
result in a minimum duty-cycle regardless of the PWM
error voltage. This relationship is shown in the perfor-
mance curves. If the inductor current exceeds the
maximum current limit (ILMAX) a secondary over-cur-
rent comparator will terminate the high-side switch on
time. If ILMAX has not been reached, the feedback volt-
age FB derived from the regulator output voltage VOUT
is then compared to the internal feedback reference volt-
age. The resultant error voltage is summed with the
current feedback and slope compensation ramp. For
power share applications, the PSHARE input will give
an input voltage such that the on time is longer if it dissi-
pates less power than other units. The high-side switch
remains on until all four comparator inputs have
summed to zero, at which time the high-side switch is
turned off and the low-side switch is turned on. In order
to eliminate cross-conduction of the high-side and low-
side switches a 15ns break-before-make delay is incor-
porated in the switch drive circuitry. In the continuous
mode of operation the low-side switch will remain on
until the end of the oscillator period. In order to improve
the low current efficiency of the EL7563C, a zero-cross-
ing comparator senses when the inductor transitions
through zero. Turning off the low-side switch at zero
inductor current prevents forward conduction through
the internal body diode and LX voltage flyback. The
output enable (EN) input allows the regulator output to
be disabled by an external logic control signal.
Output Voltage Setting
In general:
However, due to the relatively low open loop gain of the
system, gain errors will occur as the output voltage and
loop-gain is changed. This is shown in the performance
curves. A 125nA pull-up current from FB to VS forces
VOUT to GND in the event that FB is floating.
NMOS Power FETs and Drive Circuitry
The EL7563C integrates low resistance (25m
) NMOS
FETs to achieve high efficiency at 4A. In order to use an
NMOS switch for the high-side drive it is necessary to
drive the gate voltage above the source voltage (LX).
This is accomplished by bootstrapping the VHI pin
above the LX voltage with an external capacitor CVHI
and internal switch and diode. When the low-side switch
is turned on and the LX voltage is close to GND poten-
tial, capacitor CVHI is charged through internal switch
to VDRV, typically 6V with external charge pump. At
the beginning of the next cycle the high-side switch
turns on and the LX pins begins to rise from GND to
VIN potential. As the LX pin rises the positive plate of
capacitor CVHI follows and eventually reaches a value
of VDRV+VIN, typically 9V, for VIN=3.3V. This volt-
age is then level shifted and used to drive the gate of the
high-side FET, via the VHI pin. A value of 0.1 F for
CVHI is recommended.
Reference
A 1% temperature compensated bandgap reference is
integrated in the EL7563C. The external CREF capaci-
tor acts as the dominant pole of the amplifier and can be
increased in size to maximize transient noise rejection.
A value of 0.1F is recommended.
Oscillator
The system clock is generated by an internal relaxation
oscillator with a maximum duty-cycle of approximately
95%. Operating frequency can be adjusted through the
COSC pin or can be driven by an external source. If the
oscillator is driven by an external source care must be
taken in selecting the ramp amplitude. Since CSLOPE
value is derived from the COSC ramp, changes to COSC
ramp will change the CSLOPE compensation ramp
which determine the open-loop gain of the system.
Temperature Sensor
An internal temperature sensor continuously monitors
die temperature. The power share function obtains the
power dissipation information by monitoring this tem-
perature sensor output. In the event that die temperature
exceeds the thermal trip-point, the system is in fault state
and system is being shut down. The upper and low trip-
points are set to 135°C and 115°C respectively.
Power Good and Power On Reset
During power up the output regulator will be disabled
until VIN reaches a value of approximately 2.9V. About
V
OUT
1.0V
1
R
1
R
2
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×
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