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參數(shù)資料
| 型號(hào)： | EL7558AC |
| 元件分類： | 開關(guān)穩(wěn)壓 |
| 英文描述： | Adjustable Synchronous DC:DC Switching Regulator |
| 中文描述： | 可調(diào)同步DC-DC開關(guān)穩(wěn)壓器 |
| 文件頁數(shù)： | 12/13頁 |
| 文件大小： | 252K |
| 代理商： | EL7558AC |
8
EL7558AC
Programmable CPU Power Supply Unit
E
L
7558AC
Pin Description
(I=Input O=Output S=Supply)
Pin Number
Pin Name
Pin Type
Function
1
FB1
I
Voltage feedback pin for the buck regulator. Active when VCC2DET is logic low. Normally connected to exter-
nal resistor divider between VOUT and GND. A 2A pull-up current forces VOUT to VSS in the event that
FB1is floating and VCC2DET is inadvertently connected to GND.
2
CREF
I
Bandgap reference bypass capacitor. Typically 0.1F to VSS.
3
CSLOPE
I
Slope compensation capacitor. Ramp width corresponds to LX duty cycle. CSLOPE to COSC ratio is normally
1:1.5.
4
COSC
I
Oscillator timing capacitor. FOSC(Hz) can be approximated by: FOSC(Hz)= 0.0001/COSC. COSC in Farads.
5
VDD
S
Power Supply for PWM control circuitry. Normally the same potential as VIN.
6
VIN
S
Power supply for the buck regulator. Connected to the drain of the high-side NMOS FET.
7
VSSP
S
Ground return for the buck regulator. Connected to the source of the low-side synchronous NMOS FET.
8
VIN
S
Same as pin 6.
9
VSSP
S
Same as pin 7.
10
VSSP
S
Same as pin 7.
11
VSSP
S
Same as pin 7.
12
VSSP
S
Same as pin 7.
13
VCC2DET
I
VCC2DET interface logic input. When driven to logic 1 VOUT=3.500V. When driven to logic 0 the PWM uses
FB1 to determine VOUT: VOUT=1.0V*(1+R3/R4).
14
OUTEN
I
The switching regulator output is enabled when logic 1. The reference voltage output operates whenever the
power supply is quAlified (VDD>VPOR) regardless of the state of this pin.
15
OT
O
Over temperature indicator. Normally high. Pulls low when die temperature exceeds 135°C, returns to the high
state when die temperature has cooled to 100°C.
16
PWRGD
O
Power good window comparator output. Logic 1 when regulator output is within ±10% of programmed voltage.
17
TEST
I
Test pin. Must be connected to VSSP in normal operation.
18
VSSP
S
Same as pin 7.
19
VSSP
S
Same as pin 7.
20
LX
O
Inductor drive pin. High current switching output whose average voltage equAls the regulator output voltage.
21
LX
O
Same as pin 20.
22
LX
O
Same as pin 20
23
LX
O
Same as pin 20
24
VHI
I
Gate drive to high-side driver. Bootstrapped from LX with a 0.1F capacitor.
25
VSS
S
Ground return for the control circuitry.
26
C2V
I
Connected to voltage doubler output. Supplies gate drive to the low-side driver.
27
CP
O
Drives the negative side of charge pump capacitor at one-half the oscillator frequency FOSC.
28
FB2
I
Voltage feedback pin. Active when VCC2DET is logic 1. Internally preset to VOUT=3.5V.
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