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參數(shù)資料
| 型號(hào)： | EL5421CY-T13 |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 3/12頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC BUFFER QUAD R-R 12MHZ 10-MSOP |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 放大器類型： | 緩沖器 |
| 電路數(shù)： | 4 |
| 輸出類型： | 滿擺幅 |
| 轉(zhuǎn)換速率： | 10 V/µs |
| -3db帶寬： | 12MHz |
| 電流 - 輸入偏壓： | 2nA |
| 電壓 - 輸入偏移： | 2000µV |
| 電流 - 電源： | 500µA |
| 電流 - 輸出 / 通道： | 120mA |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 16.5 V，±2.25 V ~ 8.25 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
11
FN7198.2
August 2, 2007
Unused Buffers
It is recommended that any unused buffer have the input tied
to the ground plane.
Driving Capacitive Loads
The EL5421 can drive a wide range of capacitive loads. As
load capacitance increases, however, the -3dB bandwidth of
the device will decrease and the peaking increase. The
buffers drive 10pF loads in parallel with 10k
Ω with just 1.5dB
of peaking, and 100pF with 6.4dB of peaking. If less peaking
is desired in these applications, a small series resistor
(usually between 5
Ω and 50Ω) can be placed in series with
the output. However, this will obviously reduce the gain
slightly. Another method of reducing peaking is to add a
"snubber" circuit at the output. A snubber is a shunt load
consisting of a resistor in series with a capacitor. Values of
150
Ω and 10nF are typical. The advantage of a snubber is
that it does not draw any DC load current or reduce the gain.
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5421 can provide gain at high frequency. As with any
high-frequency device, good printed circuit board layout is
necessary for optimum performance. Ground plane
construction is highly recommended, lead lengths should be
as short as possible and the power supply pins must be well
bypassed to reduce the risk of oscillation. For normal single
supply operation, where the VS- pin is connected to ground,
a 0.1F ceramic capacitor should be placed from VS+ to pin
to VS- pin. A 4.7F tantalum capacitor should then be
connected in parallel, placed in the region of the buffer. One
4.7F capacitor may be used for multiple devices. This same
capacitor combination should be placed at each supply pin
to ground if split supplies are to be used.
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.6
0.4
0.3
0.2
0.1
0
255075
100
125
AMBIENT TEMPERATURE (°C)
POWE
R
DI
SSI
PATI
ON
(W)
85
486mW
θ
JA =
20
6°C
/W
M
SO
P1
0
0.5
FIGURE 26. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
EL5421
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EL5421CY-T7 | 功能描述:IC BUFFER QUAD R-R 12MHZ 10-MSOP RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標(biāo)準(zhǔn)包裝:50 系列:LinCMOS™ 放大器類型:通用 電路數(shù):4 輸出類型:- 轉(zhuǎn)換速率:0.05 V/µs 增益帶寬積:110kHz -3db帶寬:- 電流 - 輸入偏壓:0.7pA 電壓 - 輸入偏移:210µV 電流 - 電源:57µA 電流 - 輸出 / 通道:30mA 電壓 - 電源，單路/雙路(±):3 V ~ 16 V，±1.5 V ~ 8 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應(yīng)商設(shè)備封裝:14-SOIC 包裝:管件 產(chǎn)品目錄頁(yè)面:865 (CN2011-ZH PDF) 其它名稱:296-1834296-1834-5 |
| EL5421CYZ | 功能描述:運(yùn)算放大器 - 運(yùn)放 EL5421CYZ 12 MHZ QD R2R I/O OP RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| EL5421CYZ-T13 | 功能描述:運(yùn)算放大器 - 運(yùn)放 EL5421CYZ 12 MHZ QD R2R I/O OP RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| EL5421CYZ-T7 | 功能描述:運(yùn)算放大器 - 運(yùn)放 EL5421CYZ 12 MHZ QD R2R I/O OP RoHS:否 制造商:STMicroelectronics 通道數(shù)量:4 共模抑制比（最小值）:63 dB 輸入補(bǔ)償電壓:1 mV 輸入偏流（最大值）:10 pA 工作電源電壓:2.7 V to 5.5 V 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-16 轉(zhuǎn)換速度:0.89 V/us 關(guān)閉:No 輸出電流:55 mA 最大工作溫度:+ 125 C 封裝:Reel |
| EL5421T | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:12MHz Rail-to-Rail Input-Output Buffer |
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