參數(shù)資料
型號: EL5177IYZ-T7
廠商: INTERSIL CORP
元件分類: 通用總線功能
英文描述: 550MHz Differential Twisted-Pair Driver
中文描述: LINE DRIVER, PDSO10
封裝: LEAD FREE, MO-187, MSOP-10
文件頁數(shù): 8/11頁
文件大?。?/td> 413K
代理商: EL5177IYZ-T7
8
Simplified Schematic
Description of Operation and Application
Information
Product Description
The EL5177 is a wide bandwidth, low power and
single/differential ended to differential output amplifier. It can
be used as single/differential ended to differential converter.
The EL5177 is internally compensated for closed loop gain
of +1 of greater. Connected in gain of 1 and driving a 1k
differential load, the EL5177 has a -3dB bandwidth of
550MHz. Driving a 200
differential load at gain of 2, the
bandwidth is about 130MHz. The EL5177 is available with a
power down feature to reduce the power while the amplifier
is disabled.
Input, Output, and Supply Voltage Range
The EL5177 has been designed to operate with a single
supply voltage of 5V to 10V or a split supplies with its total
voltage from 5V to 10V. The amplifiers have an input
common mode voltage range from -4.3V to 3.4V for ±5V
supply. The differential mode input range (DMIR) between
the two inputs is from -2.3V to +2.3V. The input voltage
range at the REF pin is from -3.3V to 3.7V. If the input
common mode or differential mode signal is outside the
above-specified ranges, it will cause the output signal
distorted.
The output of the EL5177 can swing from -3.8V to +3.8V at
1k
differential load at ±5V supply. As the load resistance
becomes lower, the output swing is reduced.
Differential and Common Mode Gain Settings
The voltage applied at REF pin can set the output common
mode voltage and the gain is one. The differential gain is set
by the R
F
and R
G
network.
The gain setting for EL5177 is:
Where:
R
F1
= R
F2
= R
F
FIGURE 23.
Choice of Feedback Resistor and Gain Bandwidth
Product
For applications that require a gain of +1, no feedback
resistor is required. Just short the OUT+ pin to FBP pin and
OUT- pin to FBN pin. For gains greater than +1, the
feedback resistor forms a pole with the parasitic capacitance
at the inverting input. As this pole becomes smaller, the
amplifier's phase margin is reduced. This causes ringing in
the time domain and peaking in the frequency domain.
Therefore, R
F
has some maximum value that should not be
REF
R
10
R
9
R
CD
R
CD
OUT+
OUT-
C
C
R
6
R
5
C
C
R
4
R
3
R
7
R
8
R
2
R
1
V
B1
FBN
FBP
IN-
IN+
V
B2
V
S
+
V
S
-
V
ODM
V
IN
(
+
V
IN
-
)
1
R
---------------------------
R
+
G
+
×
=
V
ODM
V
IN
(
+
V
IN
-
)
1
2R
F
G
----------
+
×
=
V
OCM
V
REF
=
V
O
+
FBP
R
G
R
F2
I
N
+
I
N
-
REF
FBN
V
IN
+
V
IN
-
V
REF
R
F1
V
O
-
EL5177
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