10 FN7344.6 August 28, 2012 The bandwidth of the EL5177 depends on the load and the feedback network. R
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    參數(shù)資料
    型號(hào): EL5177IY
    廠商: Intersil
    文件頁數(shù): 2/12頁
    文件大?。?/td> 0K
    描述: IC DRVR DIFF 550MHZ TP 10-MSOP
    標(biāo)準(zhǔn)包裝: 50
    放大器類型: 差分
    電路數(shù): 1
    輸出類型: 差分
    轉(zhuǎn)換速率: 1100 V/µs
    增益帶寬積: 200MHz
    -3db帶寬: 550MHz
    電流 - 輸入偏壓: 14µA
    電壓 - 輸入偏移: 1400µV
    電流 - 電源: 12.5mA
    電流 - 輸出 / 通道: 50mA
    電壓 - 電源,單路/雙路(±): 4.75 V ~ 11 V,±2.38 V ~ 5.5 V
    工作溫度: -40°C ~ 85°C
    安裝類型: 表面貼裝
    封裝/外殼: 10-TFSOP,10-MSOP(0.118",3.00mm 寬)
    供應(yīng)商設(shè)備封裝: 10-MSOP
    包裝: 管件
    EL5177
    10
    FN7344.6
    August 28, 2012
    The bandwidth of the EL5177 depends on the load and the
    feedback network. RF and RG appear in parallel with the load for
    gains other than +1. As this combination gets smaller, the
    bandwidth falls off. Consequently, RF also has a minimum value
    that should not be exceeded for optimum bandwidth
    performance. For gain of +1, RF = 0 is optimum. For the gains
    other than +1, optimum response is obtained with RF between
    500
    Ω to 1kΩ.
    The EL5177 has a gain bandwidth product of 200MHz for RLD =
    1k
    Ω. For gains ≥5, its bandwidth can be predicted by Equation 2:
    Driving Capacitive Loads and Cables
    The EL5177 can drive a 23pF differential capacitor in parallel
    with a 1k
    Ω differential load with less than 5dB of peaking at gain
    of +1. If less peaking is desired in applications, a small series
    resistor (usually between 5
    Ω to 50Ω) can be placed in series with
    each output to eliminate most peaking. However, this will reduce
    the gain slightly. If the gain setting is greater than 1, the gain
    resistor RG can then be chosen to make up for any gain loss
    which may be created by the additional series resistor at the
    output.
    When used as a cable driver, double termination is always
    recommended for reflection-free performance. For those
    applications, a back-termination series resistor at the amplifier's
    output will isolate the amplifier from the cable and allow
    extensive capacitive drive. However, other applications may have
    high capacitive loads without a back-termination resistor. Again,
    a small series resistor at the output can help to reduce peaking.
    Disable/Power-Down
    The EL5177 can be disabled and its outputs placed in a high
    impedance state. The turn-off time is about 1.2s and the turn-
    on time is about 130ns. When disabled, the amplifier's supply
    current is reduced to 1.7A for IS+ and 120A for IS- typically,
    thereby effectively eliminating the power consumption. The
    amplifier's power-down can be controlled by standard CMOS
    signal levels at the EN pin. The applied logic signal is relative to
    VS+ pin. Letting the EN pin float or applying a signal that is less
    than 1.5V below VS+ will enable the amplifier. The amplifier will
    be disabled when the signal at the EN pin is above VS+ - 0.5V.
    Output Drive Capability
    The EL5177 has internal short circuit protection. Its typical short
    circuit current is ±40mA. If the output is shorted indefinitely, the
    power dissipation could easily increase such that the part will be
    destroyed. Maximum reliability is maintained if the output
    current never exceeds ±40mA. This limit is set by the design of
    the internal metal interconnect.
    Power Dissipation
    With the high output drive capability of the EL5177, it is possible
    to exceed the +135°C absolute maximum junction temperature
    under certain load current conditions. Therefore, it is important
    to calculate the maximum junction temperature for the
    application to determine if the load conditions or package types
    need to be modified for the amplifier to remain in the safe
    operating area.
    The maximum power dissipation allowed in a package is
    determined according to Equation 3:
    Where:
    TJMAX = Maximum junction temperature
    TAMAX = Maximum ambient temperature
    θJA = Thermal resistance of the package
    The maximum power dissipation actually produced by an IC is
    the total quiescent supply current times the total power supply
    voltage, plus the power in the IC due to the load, or:
    Where:
    VSTOT = Total supply voltage = VS+ - VS-
    ISMAX = Maximum quiescent supply current per channel
    ΔVO = Maximum differential output voltage of the application
    RLD = Differential load resistance
    ILOAD = Load current
    i = Number of channels
    By setting the two PDMAX equations equal to each other, we can
    solve the output current and RLD to avoid the device overheat.
    Power Supply Bypassing and Printed Circuit
    Board Layout
    As with any high frequency device, a good printed circuit board
    layout is necessary for optimum performance. Lead lengths
    should be as short as possible. The power supply pin must be
    well bypassed to reduce the risk of oscillation. For normal single
    supply operation, where the VS- pin is connected to the ground
    plane, a single 4.7F tantalum capacitor in parallel with a 0.1F
    ceramic capacitor from VS+ to GND will suffice. This same
    capacitor combination should be placed at each supply pin to
    ground if split supplies are to be used. In this case, the VS- pin
    becomes the negative supply rail.
    For good AC performance, parasitic capacitance should be kept
    to a minimum. Use of wire-wound resistors should be avoided
    because of their additional series inductance. Use of sockets
    should also be avoided if possible. Sockets add parasitic
    inductance and capacitance that can result in compromised
    performance. Minimizing parasitic capacitance at the amplifier's
    inverting input pin is very important. The feedback resistor
    should be placed very close to the inverting input pin. Strip line
    design techniques are recommended for the signal traces.
    As the signal is transmitted through a cable, the high frequency
    signal will be attenuated. One way to compensate this loss is to
    boost the high frequency gain at the receiver side.
    Gain
    BW
    200MHz
    =
    ×
    (EQ. 2)
    PD
    MAX
    T
    JMAX
    T
    AMAX
    Θ
    JA
    ---------------------------------------------
    =
    (EQ. 3)
    (EQ. 4)
    PD
    i
    V
    STOT
    I
    SMAX
    ×
    V
    (
    STOT
    ΔV
    O )
    ΔV
    O
    R
    LD
    ------------
    ×
    +
    ×
    =
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