參數(shù)資料
型號: EL5162IS
廠商: Intersil
文件頁數(shù): 7/15頁
文件大?。?/td> 0K
描述: IC OP AMP 500MHZ CURR FB 8-SOIC
標(biāo)準(zhǔn)包裝: 97
放大器類型: 電流反饋
電路數(shù): 1
轉(zhuǎn)換速率: 4000 V/µs
-3db帶寬: 500MHz
電流 - 輸入偏壓: 2µA
電壓 - 輸入偏移: 1500µV
電流 - 電源: 1.5mA
電流 - 輸出 / 通道: 100mA
電壓 - 電源,單路/雙路(±): 5 V ~ 12 V,±2.5 V ~ 6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 8-SOIC
包裝: 管件
15
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7388.10
January 4, 2008
EL5162, EL5163, EL5262, EL5263, EL5362
Quarter Size Outline Plastic Packages Family (QSOP)
0.010
C A B
SEATING
PLANE
DETAIL X
E
E1
1
(N/2)
(N/2)+1
N
PIN #1
I.D. MARK
b
0.004 C
c
A
SEE DETAIL "X"
A2
4°±4°
GAUGE
PLANE
0.010
L
A1
D
B
H
C
e
A
0.007
C A B
L1
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
SYMBOL
INCHES
TOLERANCE NOTES
QSOP16 QSOP24 QSOP28
A
0.068
Max.
-
A1
0.006
±0.002
-
A2
0.056
±0.004
-
b
0.010
±0.002
-
c
0.008
±0.001
-
D
0.193
0.341
0.390
±0.004
1, 3
E
0.236
±0.008
-
E1
0.154
±0.004
2, 3
e
0.025
Basic
-
L
0.025
±0.009
-
L1
0.041
Basic
-
N
16
24
28
Reference
-
Rev. F 2/07
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
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