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參數(shù)資料
| 型號： | EL5157IWZ-T7A |
| 廠商： | INTERSIL CORP |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | <1mV Voltage Offset, 600MHz Amplifiers |
| 中文描述： | 1 CHANNEL, VIDEO AMPLIFIER, PDSO5 |
| 封裝： | ROHS COMPLIANT, PLASTIC, MO-178AA, SOT-23, 5 PIN |
| 文件頁數(shù)： | 11/17頁 |
| 文件大?。?/td> | 430K |
| 代理商： | EL5157IWZ-T7A |
11
FN7386.3
June 15, 2006
determine if load conditions or package types need to be
modified to assure operation of the amplifier in a safe
operating area.
The maximum power dissipation allowed in a package is
determined according to:
Where:
T
JMAX
= Maximum junction temperature
T
AMAX
= Maximum ambient temperature
θ
JA
= Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
For sourcing:
For sinking:
Where:
V
S
= Supply voltage
I
SMAX
= Maximum quiescent supply current
V
OUT
= Maximum output voltage of the application
R
LOAD
= Load resistance tied to ground
I
LOAD
= Load current
N = number of amplifiers (max = 2)
By setting the two PD
MAX
equations equal to each other, we
can solve the output current and R
LOAD
to avoid the device
overheat.
Power Supply Bypassing Printed Circuit Board
Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as short as possible. The power supply
pin must be well bypassed to reduce the risk of oscillation.
For normal single supply operation, where the V
S
- pin is
connected to the ground plane, a single 4.7μF tantalum
capacitor in parallel with a 0.1μF ceramic capacitor from V
S
+
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the V
S
- pin becomes the negative
supply rail. See Figure 37 for a complete tuned power supply
bypass methodology.
Printed Circuit Board Layout
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
PD
MAX
T
--------------------------------------------
T
JA
–
=
PD
MAX
V
S
I
SMAX
V
S
V
OUTi
–
(
)
i
1
=
n
∑
V
Li
-----------------
×
+
×
=
PD
MAX
V
S
I
SMAX
V
OUTi
V
S
–
(
)
i
1
=
n
∑
I
LOADi
×
+
×
=
EL5156, EL5157, EL5256, EL5257
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| EL5158 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| EL5159 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| EL5160 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:200MHz Low-Power Current Feedback Amplifiers |
| EL5160_07 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:200MHz Low-Power Current Feedback Amplifiers |
| EL5160IS | 功能描述:IC OP AMP LOW PWR 200MHZ 8-SOIC RoHS:否 類別:集成電路 (IC) >> Linear - Amplifiers - Instrumentation 系列:- 標準包裝:1,000 系列:- 放大器類型:電壓反饋 電路數(shù):4 輸出類型:滿擺幅 轉換速率:33 V/µs 增益帶寬積:20MHz -3db帶寬:30MHz 電流 - 輸入偏壓:2nA 電壓 - 輸入偏移:3000µV 電流 - 電源:2.5mA 電流 - 輸出 / 通道:30mA 電壓 - 電源，單路/雙路(±):4.5 V ~ 16.5 V，±2.25 V ~ 8.25 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:14-SOIC（0.154"，3.90mm 寬） 供應商設備封裝:14-SOIC 包裝:帶卷 (TR) |
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