- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄5284 > EL5152ISZ-T7 (Intersil)IC AMP VFA SGL 300MHZ 8-SOIC PDF資料下載
參數(shù)資料
| 型號： | EL5152ISZ-T7 |
| 廠商： | Intersil |
| 文件頁數(shù)： | 2/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP VFA SGL 300MHZ 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 放大器類型： | 電壓反饋 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 180 V/µs |
| 增益帶寬積： | 165MHz |
| -3db帶寬： | 270MHz |
| 電流 - 輸入偏壓： | 120nA |
| 電壓 - 輸入偏移： | 500µV |
| 電流 - 電源： | 3mA |
| 電流 - 輸出 / 通道： | 105mA |
| 電壓 - 電源，單路/雙路(±)： | 5 V ~ 12 V，±2.5 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
10
FN7385.6
March 2, 2009
Disable/Power-Down
The EL5152 and EL5253 can be disabled with their output
placed in a high impedance state. The turn off time is about
330ns and the turn on time is about 130ns. When disabled,
the amplifier's supply current is reduced to 17A typically;
essentially eliminating power consumption. The amplifier's
power down is controlled by standard TTL or CMOS signal
levels at the ENABLE pin. The applied logic signal is relative
to VS- pin. Letting the ENABLE pin float or the application of
a signal that is less than 0.8V above VS- enables the
amplifier. The amplifier is disabled when the signal at
ENABLE pin is above VS+ - 1.5V.
Output Drive Capability
The EL5152 and EL5153 families do not have internal short
circuit protection circuitry. Typically, short circuit currents as
high as 95mA and 70mA can be expected and naturally, if
the output is shorted indefinitely the part can easily be
damaged from overheating, or excessive current density
may eventually compromise metal integrity. Maximum
reliability is maintained if the output current is always held
below ±40mA. This limit is set and limited by the design of
the internal metal interconnect. Note that in transient
applications, the part is extremely robust.
Power Dissipation
With the high output drive capability of the EL5152 and
EL5153 families, it is possible to exceed the +125°C
absolute maximum junction temperature under certain load
current conditions. Therefore, it is important to calculate the
maximum junction temperature for an application to
determine if load conditions or package types need to be
modified to assure operation of the amplifier in a safe
operating area.
The maximum power dissipation allowed in a package is
determined according to Equation 2:
Where:
TJMAX = Maximum junction temperature
TAMAX = Maximum ambient temperature
θJA = Thermal resistance of the package
The maximum power dissipation actually produced by an IC
is the total quiescent supply current times the total power
supply voltage, plus the power in the IC due to the load, or:
For sourcing:
For sinking:
Where:
VS = Supply voltage
ISMAX = Maximum quiescent supply current
VOUT = Maximum output voltage of the application
RLOAD = Load resistance tied to ground
ILOAD = Load current
N = number of amplifiers (Max = 2)
By setting the two PDMAX equations equal to each other, we
can solve the output current and RLOAD to avoid the device
overheat.
Power Supply Bypassing Printed Circuit Board
Layout
As with any high frequency device, a good printed circuit
board layout is necessary for optimum performance. Lead
lengths should be as short as possible. The power supply
pin must be well bypassed to reduce the risk of oscillation.
For normal single supply operation, where the VS- pin is
connected to the ground plane, a single 4.7F tantalum
capacitor in parallel with a 0.1F ceramic capacitor from VS+
to GND will suffice. This same capacitor combination should
be placed at each supply pin to ground if split supplies are to
be used. In this case, the VS- pin becomes the negative
supply rail. See Figure 1 for a complete tuned power supply
bypass methodology.
Printed Circuit Board Layout
For good AC performance, parasitic capacitance should be
kept to minimum. Use of wire wound resistors should be
avoided because of their additional series inductance. Use
of sockets should also be avoided if possible. Sockets add
parasitic inductance and capacitance that can result in
compromised performance. Minimizing parasitic capacitance
at the amplifier's inverting input pin is very important. The
feedback resistor should be placed very close to the
inverting input pin. Strip line design techniques are
recommended for the signal traces.
PD
MAX
T
JMAX
T
AMAX
–
Θ
JA
---------------------------------------------
=
(EQ. 2)
PD
MAX
V
S
I
SMAX
V
S
V
OUTi
–
()
i1
=
n
∑
V
OUTi
R
Li
-----------------
×
+
×
=
(EQ. 3)
PD
MAX
V
S
I
SMAX
V
OUTi
V
S
–
()
i1
=
n
∑
I
LOADi
×
+
×
=
(EQ. 4)
EL5152, EL5153, EL5252, EL5455
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| 0031.8423 | FUSE 5A 250VAC 5X20 FAST |
| EL5152ISZ-T13 | IC AMP VFA SGL 300MHZ 8-SOIC |
| 2-1676481-7 | RES 62.0 OHM 1/16W 0.1% 0603 |
| RT0603DRD078K87L | RES 8.87K OHM 1/10W .5% 0603 SMD |
| EL5152IS-T13 | IC AMP VFA SGL 300MHZ 8-SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EL5153 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:300MHz Amplifiers |
| EL515-3-0.5 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| EL515-3-1 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| EL515-3-10 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
| EL515-3-15 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Logic IC |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。