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參數(shù)資料
| 型號： | EL4584CSZ-T7 |
| 廠商： | INTERSIL CORP |
| 元件分類： | XO, clock |
| 英文描述： | Horizontal Genlock, 4FSC |
| 中文描述： | 36 MHz, VIDEO CLOCK GENERATOR, PDSO16 |
| 封裝： | 0.150 INCH, SO-16 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大小： | 244K |
| 代理商： | EL4584CSZ-T7 |
1
FN7174.2
EL4584
Horizontal Genlock, 4F
SC
The EL4584 is a PLL (Phase Lock Loop) sub system,
designed for video applications but also suitable for general
purpose use up to 36MHz. In video applications, this device
generates a TTL/CMOS compatible Pixel Clock (CLK OUT)
which is a multiple of the TV horizontal scan rate and phase
locked to it.
The reference signal is a horizontal sync signal, TTL/CMOS
format, which can be easily derived from an analog
composite video signal with the EL4583 Sync Separator. An
input signal to “coast” is provided for applications were
periodic disturbances are present in the reference video
timing such as VTR head switching. The Lock detector
output indicates correct lock.
The divider ratio is four ratios for NTSC and four similar
ratios for the PAL video timing standards, by external
selection of three control pins. These four ratios have been
selected for common video applications including 4F
SC
,
3F
SC
, 13.5MHz (CCIR 601 format) and square picture
elements used in some workstation graphics. To generate
8F
SC
, 6F
SC
, 27MHz (CCIR 601 format) etc. use the
EL4585, which includes an additional divide-by-two stage.
For applications where these frequencies are inappropriate
or for general purpose PLL applications the internal divider
can be bypassed and an external divider chain used.
Features
36MHz, general purpose PLL
4F
SC
based timing (use the EL4585 for 8F
SC
)
Compatible with EL4583 sync separator
VCXO, Xtal, or LC tank oscillator
< 2ns jitter (VCXO)
User controlled PLL capture and lock
Compatible with NTSC and PAL TV formats
8 pre-programmed TV scan rate clock divisors
Selectable external divide for custom ratios
Single 5V, low current operation
Pb-Free plus anneal available (RoHS compliant)
Applications
Pixel clock regeneration
Video compression engine (MPEG) clock generator
Video capture or digitization
PIP (Picture in Picture) timing generator
Text or graphics overlay timing
Demo Board
A demo PCB is available for this product.
FREQUENCIES AND DIVISORS
FUNCTION
3F
SC
(NOTE 1)
CCIR 601
(NOTE 2)
SQUARE
(NOTE 3)
4F
SC
Divisor
851
864
944
1135
PAL F
OSC
(MHz)
13.301
13.5
14.75
17.734
Divisor
682
858
780
910
NTSC F
OSC
MHz)
10.738
13.5
12.273
14.318
NOTES:
1. 3F
SC
numbers do not yield integer divisors.
2. CCIR 601 Divisors yield 720 pixels in the portion of each line for
NTSC and PAL.
3. Square pixels format gives 640 pixels for NTSC and 768 pixels
for PAL in the active portion.
Ordering Information
PART NUMBER
PACKAGE
TAPE &
REEL
PKG. DWG.
#
EL4584CN
16-Pin PDIP
-
MDP0031
EL4584CS
16-Pin SO (0.150”)
-
MDP0027
EL4584CS-T7
16-Pin SO (0.150”)
7”
MDP0027
EL4584CS-T13
16-Pin SO (0.150”)
13”
MDP0027
EL4584CSZ
(See Note)
16-Pin SO (0.150”)
(Pb-free)
-
MDP0027
EL4584CSZ-T7
(See Note)
16-Pin SO (0.150”)
(Pb-free)
7”
MDP0027
EL4584CSZ-T13
(See Note)
16-Pin SO (0.150”)
(Pb-free)
13”
MDP0027
*For 6F
SC
and 8F
SC
clock frequencies, see EL4585 datasheet.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material
sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb
and Pb-free soldering operations. Intersil Pb-free products are MSL classified
at Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
Data Sheet
July 25, 2005
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc.2003-2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
相關(guān)PDF資料 |
PDF描述 |
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| EL4584CS-T13 | Horizontal Genlock, 4FSC |
| EL5000AER-T13 | Circular Connector; No. of Contacts:11; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:19; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:19-11 RoHS Compliant: No |
| EL5000AER-T7 | Circular Connector; No. of Contacts:32; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:19; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:19-32 RoHS Compliant: No |
| EL5000A | High Voltage TFT-LCD Logic Driver |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EL4585 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Horizontal Genlock, 8FSC |
| EL4585C | 制造商:ELANTEC 制造商全稱:ELANTEC 功能描述:Horizontal Genlock, 8 FSC |
| EL4585CN | 功能描述:IC PLL VIDEO GP 36MHZ 16-DIP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| EL4585CS | 功能描述:IC PLL VIDEO GP 36MHZ 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| EL4585CS-T13 | 功能描述:IC GENLOCK HORZ 8FSC 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
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