- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄2068 > EL4584CS-T13 (Intersil)IC GENLOCK HORZ 4FSC 16-SOIC PDF資料下載
參數(shù)資料
| 型號(hào)： | EL4584CS-T13 |
| 廠商： | Intersil |
| 文件頁(yè)數(shù)： | 3/15頁(yè) |
| 文件大小： | 0K |
| 描述： | IC GENLOCK HORZ 4FSC 16-SOIC |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 類型： | 鎖相環(huán)路（PLL） |
| PLL： | 是 |
| 輸入： | CMOS，TTL |
| 輸出： | CMOS，TTL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:1 |
| 差分 - 輸入:輸出： | 無(wú)/無(wú) |
| 頻率 - 最大： | 36MHz |
| 除法器/乘法器： | 是/無(wú) |
| 電源電壓： | 5V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 16-SOIC |
| 包裝： | 帶卷 (TR) |
第1頁(yè)第2頁(yè)當(dāng)前第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)
11
FN7174.3
May 9, 2008
smaller, t
θ (see “Timing Diagrams” on page 5) increases,
and if R2 increases, tθ decreases. For LDET to be low at
lock, |t
θ| < 50 ns. C
4 is used mainly to attenuate high
frequency noise from the charge pump.
Lock Time
Let = R3C3. As t increases, damping increases, but so does
lock time. Decreasing t decreases damping and speeds up
loop response, but increases overshoot and thus increases
the number of hunting oscillations before lock. Critical
damping (
ζ = 1) occurs at minimum lock time. Because
decreased damping also decreases loop stability, it is
sometimes desirable to design slightly overdamped (
ζ > 1),
trading lock time for increased stability.
PCB Layout Considerations
It is highly recommended that power and ground planes be
used in layout. The oscillator and filter sections constitute a
feedback loop and thus care must be taken to avoid any
feedback signal influencing the oscillator except at the
control input. The entire oscillator/filter section should be
surrounded by copper ground to prevent unwanted
influences from nearby signals. Use separate paths for
analog and digital supplies, keeping the analog (oscillator
section) as short and free from spurious signals as possible.
Careful attention must be paid to correct bypassing. Keep
lead lengths short and place bypass capacitors as close to
the supply pins as possible. If laying out a PCB to use
discrete components for the VCO section, care must be
taken to avoid parasitic capacitance at the OSC pins 3 and
5, and FILTER out (pin 7). Remove ground and power plane
copper above and below these traces to avoid making a
capacitive connection to them. It is also recommended to
enclose the oscillator section within a shielded cage to
reduce external influences on the VCO, as they tend to be
very sensitive to “handwaving” influences, the LC variety
being more sensitive than crystal controlled oscillators. In
general, the higher the operating frequency, the more
important these considerations are. Self contained VCXO or
VCO modules are already mounted in a shielding cage and
therefore do not require as much consideration in layout.
Many crystal manufacturers publish informative literature
regarding use and layout of oscillators which should be
helpful.
The VCO and loop filter section of the EL4583, EL4584,
EL4585 demo board can be implemented in Figures 18, 19
and 20.
TABLE 5. LC LOOP FILTER COMPONENTS (APPROXIMATE)
FREQUENCY
(MHz)
R2
(k
Ω)
R3
(k
Ω)
C3
(F)
C4
(F)
13.301
100
30
0.01
0.001
13.5
100
30
0.01
0.001
14.75
100
33
0.01
0.001
17.734
100
39
0.01
0.001
10.738
100
22
0.01
0.001
12.273
100
27
0.01
0.001
14.318
100
30
0.01
0.001
C
3
K
dKVCO
N
ω
2
n
------------------------
4.77e
5
–
() 6.05e6
()
910
() 5000
()
2
------------------------------------------------------
0.01F
==
=
(EQ. 9)
C
4
C
3
10
-------
0.0001F
==
(EQ. 10)
R
3
2N
ζω
n
K
dKVCO
------------------------
2
() 910
() 1
() 5000
()
4.77e
5
–
() 6.05e6
()
------------------------------------------------------
31.5k
Ω
==
=
(EQ. 11)
FIGURE 17. TYPICAL LOOP FILTER
TABLE 6. XTAL LOOP FILTER COMPONENTS
(APPROXIMATE)
FREQUENCY
(MHz)
R2
(k
Ω)
R3
(M
Ω)
C3
(pF)
C4
(pF)
13.301
100
4.3
68
6.8
13.5
100
4.3
68
6.8
14.75
100
4.3
68
6.8
17.734
100
4.3
68
6.8
10.738
100
4.3
68
6.8
12.273
100
4.3
68
6.8
14.318
100
4.3
68
6.8
EL4584
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| EL4585CS-T13 | IC GENLOCK HORZ 8FSC 16-SOIC |
| EL5128CY-T7 | IC AMP/BUFFER DUAL VCOM 10-MSOP |
| EL5129IREZ | IC BUFFER GAMMA 6-CHAN 20HTSSOP |
| EL5228IL-T7A | IC AMP VCOM DUAL BUFF 10-DFN |
| EL5623IRZ | IC BUFFER MULTI CHANNEL 16-TSSOP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EL4584CST-13 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Horizontal Genlock, 4FSC |
| EL4584CS-T7 | 功能描述:IC PLL VIDEO GP 36MHZ 16-SOIC RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無(wú)/無(wú) 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| EL4584CSZ | 功能描述:鎖相環(huán) - PLL EL4584CSZ H-SYNC GENLOCK RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| EL4584CSZ-EVAL | 功能描述:時(shí)鐘和定時(shí)器開發(fā)工具 EL4584CSZ-EVAL EVALUATION BRD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V |
| EL4584CSZ-T13 | 功能描述:鎖相環(huán) - PLL EL4584CSZ H-SYNC GEN LOCK RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。