參數(shù)資料
型號: EL4543IL
廠商: Intersil
文件頁數(shù): 3/18頁
文件大?。?/td> 0K
描述: IC DRVR TWISTED TRPL DIFF 20-QFN
標(biāo)準(zhǔn)包裝: 90
應(yīng)用: 驅(qū)動器
輸出類型: 差分
電路數(shù): 3
-3db帶寬: 350MHz
轉(zhuǎn)換速率: 1000 V/µs
電流 - 電源: 14.5mA
電流 - 輸出 / 通道: 60mA
電壓 - 電源,單路/雙路(±): 5 V ~ 12 V,±2.5 V ~ 6 V
安裝類型: 表面貼裝
封裝/外殼: 20-VFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 20-QFN 裸露焊盤(4x4)
包裝: 管件
11
FN7325.11
September 13, 2007
Operational Description and Application
Information
Introduction
The EL4543 is designed to differentially drive composite
RGB video signals onto twisted pair lines, while
simultaneously encoding horizontal and vertical sync signals
as common mode output. The entire video signal plus sync
can therefore be transmitted on 3 twisted pairs of wire. When
utilizing CAT5 cable, the 4th available twisted pair can be
used for transmission of audio, data or control information.
The distribution of composite video over standard CAT5
cable enables enormous cost and labor savings compared
with traditional coaxial cable, when considering both the
relative low price and ease of pulling CAT5 cable.
Functional Description
The EL4543 provides three fully differential high-speed
amplifiers, suitable for driving high-resolution composite
video signals onto twisted pair or standard coaxial cable.
The input common-mode range extends to the negative rail,
allowing simple ground-referenced input termination to be
used with a single supply. The amplifiers provide a fixed gain
of +2 to compensate for standard video cable termination
schemes. Horizontal and Vertical sync signals (HSYNC and
VSYNC) are passed to an internal Logic Encoding Block to
encode the sync information as three discrete signals of
different voltage levels. Generally, in differential amplifiers an
external VREF pin is used to control the common mode level
of the differential output; in the case of the EL4543 the VREF
of each of the three internal amplifier channels receives a
signal from the Logic Encoding Block with encoded HSYNC
and VSYNC information. The final output consists of three
fully differential video signals, with sync encoded on the
common mode of each of the three RGB differential signals.
HSYNC and VSYNC can easily be separated from the
differential output signals, decoded and transmitted along
with the RGB video signals to the video monitor.
Sync Transmission
The EL4543 encodes HSYNC and VSYNC signals on the
common mode output of the differential video signals; Red,
Green and Blue respectively. Data Sheet Figures 16, 17 and
18 clearly illustrate that the sum of the common mode
voltages results in a fixed average DC level with no AC
content and illustrates the logic levels. This eliminates EMI
radiation into any common mode signal along the twisted
pairs of CAT5 cable.
FIGURE 37. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
Typical Performance Curves (Continued)
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - QFN EXPOSED
DIEPAD SOLDERED TO PCB PER JESD51-5
AMBIENT TEMPERATURE (°C)
POWER
DISS
IPATION
(W)
3
2.5
0.5
0
1.5
025
75
100
125
85
150
50
2
1
2.500W
θ
JA =
40
°C
/W
Q
FN
20
(4
m
x
4m
m
)
-
+
-
+
-
+
INA
OUTA
EN
VREF
-
+
-
+
-
+
INB
OUTB
EN
VREF
-
+
-
+
-
+
INC
OUTC
EN
VREF
LOGIC
DECODING
RCM
GCM
BCM
VSYNC
HSYNC
EN
ENABL
E
/DISABLE
FIGURE 38. BLOCK DIAGRAM EL4543
EL4543
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