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參數(shù)資料
| 型號(hào)： | EL4452CS |
| 英文描述： | Wideband Variable-Gain Amplifier with Gain of 10 |
| 中文描述： | 寬帶可變?cè)鲆媾c10增益放大器 |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 270K |
| 代理商： | EL4452CS |
EL4452C
Wideband Variable-Gain Amplifier with Gain of 10
Absolute Maximum Ratings (T
A
e
25 C)
Va
Positive Supply Voltage
165V
VS
Va to Vb Supply Voltage
33V
VIN
Voltage at any Input or Feedback
Va to Vb
DVIN
Difference between Pairs of
Inputs or Feedback
6V
IIN
Current into any Input or
Feedback Pin
4 mA
IOUT
Output Current
30 mA
PD
Maximum Power Dissipation
See Curves
TA
Operating Temperature Range
b
40 Cto a85 C
TS
Storage Temperature Range
b
60 Cto a150 C
Important Note
All parameters having MinMax specifications are guaranteed The Test Level column indicates the specific device testing actually
performed during production and Quality inspection Elantec performs most electrical tests using modern high-speed automatic test
equipment specifically the LTX77 Series system Unless otherwise noted all tests are pulsed tests therefore TJeTCeTA
Test Level
Test Procedure
I
100% production tested and QA sample tested per QA test plan QCX0002
II
100% production tested at TA e 25 C and QA sample tested at TA e 25 C
TMAX and TMIN per QA test plan QCX0002
III
QA sample tested per QA test plan QCX0002
IV
Parameter is guaranteed (but not tested) by Design and Characterization Data
V
Parameter is typical value at TA e 25 C for information purposes only
Open-Loop DC Electrical Characteristics
Power supplies at g5V TA e 25 C RF e 910X RG e 100X RL e 500X
Parameter
Description
Min
Typ
Max
Test
Units
Level
VDIFF
Signal Input Differential Input Voltage - Clipping
04
05
I
V
06% Nonlinearity
04
V
VCM
Common-Mode Range (All Inputs VDIFF e 0) VS e g5V
g
20
g
28
I
V
VS e g15V
g
120
g
128
V
VOS
Input Offset Voltage
10
I
mV
VOS FB
Output Offset Voltage
10
I
mV
VG 100%
Extrapolated Voltage for 100% Gain
18
21
22
I
V
VG 0%
Extrapolated Voltage for 0% Gain
b
016
b
006
004
I
V
VG 1V
Gain at VGAIN e 1 (Rf e 910X Rg e 100X)
49
535
59
I
VV
IB
Input Bias Current (All Inputs)
b
20
b
90
I
mA
IOS
Input Offset Current Between VINa and VINb
05
4
I
mA
VGAINa and VGAINb
FT
Signal Feedthrough VG eb1V
b
100
b
70
I
dB
RIN Signal
Input Resistance Signal Input
25
60
I
k
X
RIN Gain
Input Resistance Gain Input
50
120
I
k
X
RIN FB
Input Resistance Feedback
25
60
V
k
X
CMRR
Common-Mode Rejection Ratio VIN
70
90
I
dB
2
TD
is
33in
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